DE60308225D1 - Verbesserung der transfer-leistungsfähigkeit vom optischen speicher - Google Patents

Verbesserung der transfer-leistungsfähigkeit vom optischen speicher

Info

Publication number
DE60308225D1
DE60308225D1 DE60308225T DE60308225T DE60308225D1 DE 60308225 D1 DE60308225 D1 DE 60308225D1 DE 60308225 T DE60308225 T DE 60308225T DE 60308225 T DE60308225 T DE 60308225T DE 60308225 D1 DE60308225 D1 DE 60308225D1
Authority
DE
Germany
Prior art keywords
optical storage
storage device
command
data transfer
interrupt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60308225T
Other languages
English (en)
Other versions
DE60308225T2 (de
Inventor
Joseph Bennett
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE60308225D1 publication Critical patent/DE60308225D1/de
Application granted granted Critical
Publication of DE60308225T2 publication Critical patent/DE60308225T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0674—Disk device
    • G06F3/0677—Optical disk device, e.g. CD-ROM, DVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Information Transfer Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Bus Control (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Optical Integrated Circuits (AREA)
  • Glass Compositions (AREA)
DE60308225T 2002-12-31 2003-11-21 Verbesserung der transfer-leistungsfähigkeit vom optischen speicher Expired - Lifetime DE60308225T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/335,049 US6810443B2 (en) 2002-12-31 2002-12-31 Optical storage transfer performance
US335049 2002-12-31
PCT/US2003/037563 WO2004061688A1 (en) 2002-12-31 2003-11-21 Improving optical storage transfer performance

Publications (2)

Publication Number Publication Date
DE60308225D1 true DE60308225D1 (de) 2006-10-19
DE60308225T2 DE60308225T2 (de) 2007-01-04

Family

ID=32655244

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60308225T Expired - Lifetime DE60308225T2 (de) 2002-12-31 2003-11-21 Verbesserung der transfer-leistungsfähigkeit vom optischen speicher

Country Status (10)

Country Link
US (1) US6810443B2 (de)
EP (1) EP1579336B1 (de)
JP (1) JP4664077B2 (de)
KR (1) KR100840433B1 (de)
CN (1) CN100336043C (de)
AT (1) ATE338980T1 (de)
AU (1) AU2003291169A1 (de)
DE (1) DE60308225T2 (de)
TW (1) TWI239508B (de)
WO (1) WO2004061688A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060075164A1 (en) * 2004-09-22 2006-04-06 Ooi Eng H Method and apparatus for using advanced host controller interface to transfer data
US20070233821A1 (en) * 2006-03-31 2007-10-04 Douglas Sullivan Managing system availability
KR100843199B1 (ko) 2006-08-10 2008-07-02 삼성전자주식회사 고속 아이.디.이. 인터페이스 장치 및 그 방법
US8225052B2 (en) 2009-06-03 2012-07-17 Micron Technology, Inc. Methods for controlling host memory access with memory devices and systems
US11036633B2 (en) * 2019-08-22 2021-06-15 Micron Technology, Inc. Hierarchical memory apparatus
CN110519740B (zh) * 2019-09-04 2022-07-22 大唐半导体科技有限公司 一种链路层处理装置
CN110572387B (zh) * 2019-09-04 2022-05-10 大唐半导体科技有限公司 一种链路层处理方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62226257A (ja) 1986-03-27 1987-10-05 Toshiba Corp 演算処理装置
US5664224A (en) * 1993-07-23 1997-09-02 Escom Ag Apparatus for selectively loading data blocks from CD-ROM disks to buffer segments using DMA operations
US5432801A (en) * 1993-07-23 1995-07-11 Commodore Electronics Limited Method and apparatus for performing multiple simultaneous error detection on data having unknown format
US5689726A (en) * 1995-05-03 1997-11-18 United Microelectronics Corporation Computer system interface adapter capable of automatic self-configuration and self-diagnosis before operating system initiation
WO1997000480A1 (en) * 1995-06-15 1997-01-03 Intel Corporation Architecture for an i/o processor that integrates a pci to pci bridge
US5819112A (en) * 1995-09-08 1998-10-06 Microsoft Corporation Apparatus for controlling an I/O port by queuing requests and in response to a predefined condition, enabling the I/O port to receive the interrupt requests
US5890002A (en) * 1996-12-31 1999-03-30 Opti Inc. System and method for bus master emulation
US6085278A (en) 1998-06-02 2000-07-04 Adaptec, Inc. Communications interface adapter for a computer system including posting of system interrupt status
US6651113B1 (en) * 1999-12-22 2003-11-18 Intel Corporation System for writing data on an optical storage medium without interruption using a local write buffer

Also Published As

Publication number Publication date
TWI239508B (en) 2005-09-11
EP1579336A1 (de) 2005-09-28
US6810443B2 (en) 2004-10-26
JP4664077B2 (ja) 2011-04-06
KR100840433B1 (ko) 2008-06-20
KR20050085884A (ko) 2005-08-29
JP2006512674A (ja) 2006-04-13
ATE338980T1 (de) 2006-09-15
AU2003291169A1 (en) 2004-07-29
DE60308225T2 (de) 2007-01-04
EP1579336B1 (de) 2006-09-06
CN1514378A (zh) 2004-07-21
CN100336043C (zh) 2007-09-05
TW200414130A (en) 2004-08-01
WO2004061688A1 (en) 2004-07-22
US20040128409A1 (en) 2004-07-01

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Legal Events

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