DE60226234D1 - Verfahren und vorrichtung zum entsynchronisieren e - Google Patents
Verfahren und vorrichtung zum entsynchronisieren eInfo
- Publication number
- DE60226234D1 DE60226234D1 DE60226234T DE60226234T DE60226234D1 DE 60226234 D1 DE60226234 D1 DE 60226234D1 DE 60226234 T DE60226234 T DE 60226234T DE 60226234 T DE60226234 T DE 60226234T DE 60226234 D1 DE60226234 D1 DE 60226234D1
- Authority
- DE
- Germany
- Prior art keywords
- fifo
- write
- read
- desynchronizer
- gapping
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- RGNPBRKPHBKNKX-UHFFFAOYSA-N hexaflumuron Chemical compound C1=C(Cl)C(OC(F)(F)C(F)F)=C(Cl)C=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F RGNPBRKPHBKNKX-UHFFFAOYSA-N 0.000 abstract 1
- 238000005259 measurement Methods 0.000 abstract 1
- 230000009885 systemic effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
- H04J3/076—Bit and byte stuffing, e.g. SDH/PDH desynchronisers, bit-leaking
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Interface Circuits In Exchanges (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
- Emergency Protection Circuit Devices (AREA)
- Electrotherapy Devices (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/865,324 US6463111B1 (en) | 2001-05-25 | 2001-05-25 | Method and apparatus for desynchronizing a DS-3 signal and/or an E3 signal from the data portion of an STS-STM payload |
US865324 | 2001-05-25 | ||
PCT/US2002/014155 WO2002098087A1 (en) | 2001-05-25 | 2002-05-06 | Method and apparatus for desynchronizing a ds-3 signal and/or an e3 signal from the data portion of an sts/stm payload |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60226234D1 true DE60226234D1 (de) | 2008-06-05 |
DE60226234T2 DE60226234T2 (de) | 2009-05-28 |
Family
ID=25345248
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60226234T Expired - Lifetime DE60226234T2 (de) | 2001-05-25 | 2002-05-06 | Verfahren und vorrichtung zum entsynchronisieren eines ds-3-signals und/oder eines e3-signals aus dem datenteil eines sts/stm-nutzsignals |
Country Status (7)
Country | Link |
---|---|
US (1) | US6463111B1 (de) |
EP (1) | EP1400079B1 (de) |
CN (1) | CN100380898C (de) |
AT (1) | ATE393525T1 (de) |
DE (1) | DE60226234T2 (de) |
TW (1) | TWI225741B (de) |
WO (1) | WO2002098087A1 (de) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6711227B1 (en) * | 1999-02-05 | 2004-03-23 | Broadcom Corporation | Synchronizing method and apparatus |
US7075951B1 (en) * | 2001-11-29 | 2006-07-11 | Redback Networks Inc. | Method and apparatus for the operation of a storage unit in a network element |
US7227876B1 (en) * | 2002-01-28 | 2007-06-05 | Pmc-Sierra, Inc. | FIFO buffer depth estimation for asynchronous gapped payloads |
DE10231648B4 (de) * | 2002-07-12 | 2007-05-03 | Infineon Technologies Ag | Verfahren und Vorrichtung zur Stuffing-Regelung |
US7180914B2 (en) * | 2002-08-19 | 2007-02-20 | Applied Micro Circuits Corporation | Efficient asynchronous stuffing insertion and destuffing removal circuit |
CN100417106C (zh) * | 2003-03-12 | 2008-09-03 | 中兴通讯股份有限公司 | 一种用于2m映射片中的去泄漏方法 |
CN1787412B (zh) * | 2004-12-08 | 2010-05-05 | 中兴通讯股份有限公司 | 一种基于双端ram的时分复用的au指针解释器 |
EP1708080A1 (de) * | 2005-03-31 | 2006-10-04 | STMicroelectronics Pvt. Ltd | FIFO-Speicher mit konfigurierbarer Länge |
CN1848717B (zh) * | 2005-04-15 | 2011-04-06 | 华为技术有限公司 | 获得异步解映射时钟的方法及电路 |
CN1855786B (zh) * | 2005-04-19 | 2010-05-05 | 中兴通讯股份有限公司 | 一种基于非整数泄露率的支路信号恢复方法及其装置 |
ITMI20051286A1 (it) * | 2005-07-08 | 2007-01-09 | Alcatel Italia | Dispositivo e metodo per mappare-demappare in segnale tributario in-da trame di trasporto |
WO2007016823A1 (fr) * | 2005-08-05 | 2007-02-15 | Zte Corporation | Procédé et appareil de récupération d'un signal de dérivation fondé sur le débit de fuite non entier |
CN101176302B (zh) * | 2005-11-02 | 2010-10-06 | 中兴通讯股份有限公司 | 一种基于非整数泄露率的支路信号恢复方法及其装置 |
EP1798882B1 (de) * | 2005-12-14 | 2011-08-03 | Alcatel Lucent | Verfahren und Vorrichtung zur Rückabbildung einer Untersystemeinheit und zur Zurückgewinnung des Synchronismus der niedrigen Untersystemeinheit |
US8149871B2 (en) * | 2009-02-13 | 2012-04-03 | Cisco Technology, Inc. | Pointer offset mechanism enabling cost effective SONET/SDH mapping/demapping over ethernet |
US8228216B2 (en) * | 2010-09-08 | 2012-07-24 | Hewlett-Packard Development Company, L.P. | Systems and methods for data compression |
CN104219015B (zh) * | 2013-06-03 | 2018-05-25 | 中兴通讯股份有限公司 | 一种sdh中支路信号的时钟和数据恢复方法及装置 |
CN108108148B (zh) * | 2016-11-24 | 2021-11-16 | 舒尔电子(苏州)有限公司 | 一种数据处理方法和装置 |
CN106603216B (zh) * | 2016-12-06 | 2019-12-10 | 广东高云半导体科技股份有限公司 | 一种无线微波通信系统的e1定时恢复装置及其应用 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4159535A (en) | 1978-01-23 | 1979-06-26 | Rockwell International Corporation | Framing and elastic store circuit apparatus |
FR2482806A1 (fr) | 1980-05-19 | 1981-11-20 | France Etat | Procede et dispositif de synchronisation de signal numerique |
US4347620A (en) | 1980-09-16 | 1982-08-31 | Northern Telecom Limited | Method of and apparatus for regenerating a signal frequency in a digital signal transmission system |
US4674088A (en) | 1985-03-07 | 1987-06-16 | Northern Telecom Limited | Method and apparatus for detecting frame synchronization |
US4964142A (en) | 1987-07-15 | 1990-10-16 | Kadiresan Annamalai | Receiver synchronization in encoder/decoder |
US5033064A (en) | 1988-12-09 | 1991-07-16 | Transwitch Corporation | Clock dejitter circuit for regenerating DS1 signal |
US4928275A (en) | 1989-05-26 | 1990-05-22 | Northern Telecom Limited | Synchronization of asynchronous data signals |
US5297180A (en) | 1989-11-17 | 1994-03-22 | Transwitch Corporation | Digital clock dejitter circuits for regenerating clock signals with minimal jitter |
EP0450269B1 (de) * | 1990-03-14 | 2000-06-07 | Alcatel | Phasenverriegelte Schleifenanordnung |
US5052025A (en) | 1990-08-24 | 1991-09-24 | At&T Bell Laboratories | Synchronous digital signal to asynchronous digital signal desynchronizer |
US5157655A (en) | 1990-10-31 | 1992-10-20 | Transwitch Corp. | Apparatus for generating a ds-3 signal from the data component of an sts-1 payload signal |
US5285206A (en) * | 1992-08-25 | 1994-02-08 | Alcatel Network Systems, Inc. | Phase detector for elastic store |
US5548534A (en) * | 1994-07-08 | 1996-08-20 | Transwitch Corporation | Two stage clock dejitter circuit for regenerating an E4 telecommunications signal from the data component of an STS-3C signal |
US6064706A (en) * | 1996-05-01 | 2000-05-16 | Alcatel Usa, Inc. | Apparatus and method of desynchronizing synchronously mapped asynchronous data |
-
2001
- 2001-05-25 US US09/865,324 patent/US6463111B1/en not_active Expired - Fee Related
-
2002
- 2002-05-06 CN CNB028105257A patent/CN100380898C/zh not_active Expired - Fee Related
- 2002-05-06 EP EP02734195A patent/EP1400079B1/de not_active Expired - Lifetime
- 2002-05-06 WO PCT/US2002/014155 patent/WO2002098087A1/en not_active Application Discontinuation
- 2002-05-06 AT AT02734195T patent/ATE393525T1/de not_active IP Right Cessation
- 2002-05-06 DE DE60226234T patent/DE60226234T2/de not_active Expired - Lifetime
- 2002-05-22 TW TW091110741A patent/TWI225741B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP1400079A1 (de) | 2004-03-24 |
TWI225741B (en) | 2004-12-21 |
CN100380898C (zh) | 2008-04-09 |
CN1511400A (zh) | 2004-07-07 |
DE60226234T2 (de) | 2009-05-28 |
ATE393525T1 (de) | 2008-05-15 |
WO2002098087A1 (en) | 2002-12-05 |
EP1400079A4 (de) | 2006-04-05 |
EP1400079B1 (de) | 2008-04-23 |
US6463111B1 (en) | 2002-10-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE60226234D1 (de) | Verfahren und vorrichtung zum entsynchronisieren e | |
US20080117938A1 (en) | Synchronization Module | |
US8386828B1 (en) | Circuit for estimating latency through a FIFO buffer | |
KR900014984A (ko) | 2개 비동기 클럭신호간의 시간지연의 출력신호표시를 제공하는 회로소자와 방법 | |
US9116561B2 (en) | Time reference systems for CPU-based and optionally FPGA-based subsystems | |
US6901527B2 (en) | Synchronizing multiple time stamps distributed within a computer system with main time of day register | |
ATE294464T1 (de) | Frequenzdetektor für taktjitter in einem taktrückgewinnungssystem | |
CN103546124B (zh) | 一种信号触发时刻值获取装置 | |
TW200510987A (en) | Method and related apparatus for outputting clock through data path | |
TW200723695A (en) | Phase error determination method and digital phase-locked loop system | |
US7516032B2 (en) | Resolution in measuring the pulse width of digital signals | |
SE9301327D0 (sv) | Sammansatt klocksignal | |
US8498373B2 (en) | Generating a regularly synchronised count value | |
US8860433B1 (en) | Method and system for self-contained timing and jitter measurement | |
US6859027B2 (en) | Device and method for measuring jitter in phase locked loops | |
JP5055721B2 (ja) | 振動センサ式差圧・圧力伝送器 | |
CN101359014B (zh) | 内建抖动测量电路 | |
KR100280203B1 (ko) | 비트 리킹 장치 | |
MY138892A (en) | Apparatus to generate a bit clock and a method of generating the bit clock | |
CN114070762B (zh) | 网络监测探针组件、同步方法、数据采集分析装置 | |
KR100328849B1 (ko) | 액정표시소자의모드선택회로 | |
Telba | Low Jitter Circuits in Digital System using Phase Locked Loop | |
JP3708900B2 (ja) | ジッタ測定器 | |
JP2002026704A (ja) | クロック異常検出装置及びその方法 | |
El-Ela et al. | Desynchronizer circuit in SDH system using digital PLL |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |