DE60225567D1 - Speicherschaltung - Google Patents

Speicherschaltung

Info

Publication number
DE60225567D1
DE60225567D1 DE60225567T DE60225567T DE60225567D1 DE 60225567 D1 DE60225567 D1 DE 60225567D1 DE 60225567 T DE60225567 T DE 60225567T DE 60225567 T DE60225567 T DE 60225567T DE 60225567 D1 DE60225567 D1 DE 60225567D1
Authority
DE
Germany
Prior art keywords
array
driver cells
memory circuit
memory
vias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60225567T
Other languages
English (en)
Other versions
DE60225567T2 (de
Inventor
Stephen J Battersby
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Application granted granted Critical
Publication of DE60225567D1 publication Critical patent/DE60225567D1/de
Publication of DE60225567T2 publication Critical patent/DE60225567T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Static Random-Access Memory (AREA)
DE60225567T 2001-08-17 2002-08-14 Speicherschaltung Expired - Lifetime DE60225567T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB0120113 2001-08-17
GBGB0120113.6A GB0120113D0 (en) 2001-08-17 2001-08-17 Memory circuit
PCT/IB2002/003281 WO2003017281A2 (en) 2001-08-17 2002-08-14 Memory circuit

Publications (2)

Publication Number Publication Date
DE60225567D1 true DE60225567D1 (de) 2008-04-24
DE60225567T2 DE60225567T2 (de) 2009-04-23

Family

ID=9920597

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60225567T Expired - Lifetime DE60225567T2 (de) 2001-08-17 2002-08-14 Speicherschaltung

Country Status (10)

Country Link
US (1) US6639821B2 (de)
EP (1) EP1425753B1 (de)
JP (1) JP2005500681A (de)
KR (1) KR100880098B1 (de)
CN (1) CN100431040C (de)
AT (1) ATE389229T1 (de)
DE (1) DE60225567T2 (de)
GB (1) GB0120113D0 (de)
TW (1) TWI223816B (de)
WO (1) WO2003017281A2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7312487B2 (en) * 2004-08-16 2007-12-25 International Business Machines Corporation Three dimensional integrated circuit
US8648426B2 (en) * 2010-12-17 2014-02-11 Seagate Technology Llc Tunneling transistors
CN111048130B (zh) * 2018-10-12 2022-03-04 中电海康集团有限公司 磁性随机存储器

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4442507A (en) 1981-02-23 1984-04-10 Burroughs Corporation Electrically programmable read-only memory stacked above a semiconductor substrate
US4646266A (en) 1984-09-28 1987-02-24 Energy Conversion Devices, Inc. Programmable semiconductor structures and methods for using the same
US5252857A (en) * 1991-08-05 1993-10-12 International Business Machines Corporation Stacked DCA memory chips
US5128831A (en) * 1991-10-31 1992-07-07 Micron Technology, Inc. High-density electronic package comprising stacked sub-modules which are electrically interconnected by solder-filled vias
US5793115A (en) 1993-09-30 1998-08-11 Kopin Corporation Three dimensional processor using transferred thin film circuits
DE69510337T2 (de) 1994-12-22 1999-12-16 Koninkl Philips Electronics Nv Halbleiterspeicheranordnungen und herstellungsverfahren
US5969380A (en) * 1996-06-07 1999-10-19 Micron Technology, Inc. Three dimensional ferroelectric memory
US5861328A (en) * 1996-10-07 1999-01-19 Motorola, Inc. Method of fabricating GMR devices
US5835396A (en) * 1996-10-17 1998-11-10 Zhang; Guobiao Three-dimensional read-only memory
US5915167A (en) 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
DE19744095A1 (de) * 1997-10-06 1999-04-15 Siemens Ag Speicherzellenanordnung

Also Published As

Publication number Publication date
EP1425753B1 (de) 2008-03-12
EP1425753A2 (de) 2004-06-09
KR100880098B1 (ko) 2009-01-23
CN1543651A (zh) 2004-11-03
US6639821B2 (en) 2003-10-28
CN100431040C (zh) 2008-11-05
ATE389229T1 (de) 2008-03-15
WO2003017281A2 (en) 2003-02-27
DE60225567T2 (de) 2009-04-23
KR20040032921A (ko) 2004-04-17
US20030035338A1 (en) 2003-02-20
JP2005500681A (ja) 2005-01-06
GB0120113D0 (en) 2001-10-10
WO2003017281A3 (en) 2003-12-04
TWI223816B (en) 2004-11-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition