DE602007009176D1 - Phasenregelkreis mit adaptiver Bandbreite und Vorkopplungsteiler - Google Patents

Phasenregelkreis mit adaptiver Bandbreite und Vorkopplungsteiler

Info

Publication number
DE602007009176D1
DE602007009176D1 DE602007009176T DE602007009176T DE602007009176D1 DE 602007009176 D1 DE602007009176 D1 DE 602007009176D1 DE 602007009176 T DE602007009176 T DE 602007009176T DE 602007009176 T DE602007009176 T DE 602007009176T DE 602007009176 D1 DE602007009176 D1 DE 602007009176D1
Authority
DE
Germany
Prior art keywords
locked loop
phase locked
adaptive bandwidth
feedforward
divider
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602007009176T
Other languages
English (en)
Inventor
Deog-Kyoon Jeong
Jaeha Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Silicon Image Inc
Original Assignee
Silicon Image Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silicon Image Inc filed Critical Silicon Image Inc
Publication of DE602007009176D1 publication Critical patent/DE602007009176D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0895Details of the current generators
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
DE602007009176T 2006-12-11 2007-10-31 Phasenregelkreis mit adaptiver Bandbreite und Vorkopplungsteiler Active DE602007009176D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/637,254 US7602253B2 (en) 2006-12-11 2006-12-11 Adaptive bandwidth phase locked loop with feedforward divider

Publications (1)

Publication Number Publication Date
DE602007009176D1 true DE602007009176D1 (de) 2010-10-28

Family

ID=38996611

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602007009176T Active DE602007009176D1 (de) 2006-12-11 2007-10-31 Phasenregelkreis mit adaptiver Bandbreite und Vorkopplungsteiler

Country Status (7)

Country Link
US (1) US7602253B2 (de)
EP (1) EP1933464B1 (de)
JP (1) JP5515216B2 (de)
KR (1) KR101470990B1 (de)
CN (1) CN101202546B (de)
DE (1) DE602007009176D1 (de)
TW (1) TWI356592B (de)

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US7747237B2 (en) * 2004-04-09 2010-06-29 Skyworks Solutions, Inc. High agility frequency synthesizer phase-locked loop
US20080317185A1 (en) * 2007-06-25 2008-12-25 Broadcom Corporation Dual phase locked loop (pll) architecture for multi-mode operation in communication systems
US7821343B1 (en) * 2008-08-27 2010-10-26 Altera Corporation Transmitter with multiple phase locked loops
TWI384761B (zh) * 2009-02-20 2013-02-01 Sunplus Technology Co Ltd Low jitter, wide operating frequency band and frequency synthesis system suitable for low voltage operation
US8044726B2 (en) * 2009-03-17 2011-10-25 Qualcomm Incorporated Systems and methods for self testing a voltage controlled oscillator
US7973612B2 (en) * 2009-04-26 2011-07-05 Qualcomm Incorporated Supply-regulated phase-locked loop (PLL) and method of using
JP2011188077A (ja) * 2010-03-05 2011-09-22 Renesas Electronics Corp 位相同期回路及びその制御方法
US8415999B2 (en) 2010-07-28 2013-04-09 International Business Machines Corporation High frequency quadrature PLL circuit and method
US8258835B1 (en) * 2011-06-15 2012-09-04 Asahi Kasei Microdevices Corporation Cancellation system for phase jumps at loop gain changes in fractional-N frequency synthesizers
CN103269220A (zh) * 2013-05-30 2013-08-28 上海坤锐电子科技有限公司 基于数字琐相环的nfc有源负载调制的时钟恢复电路
CN103346784B (zh) * 2013-06-18 2016-04-13 成都嘉纳海威科技有限责任公司 一种用于锁相环的匹配型电荷泵电路
US9350362B2 (en) 2013-10-08 2016-05-24 Thomas & Betts International, Llc Programmable slew rate phase locked loop
US9444473B2 (en) * 2014-09-09 2016-09-13 Qualcomm Incorporated Increased synthesizer performance in carrier aggregation/multiple-input, multiple-output systems
ES2719545T3 (es) 2015-04-15 2019-07-11 Mitsubishi Electric Corp Sintetizador
US10958278B2 (en) 2019-07-31 2021-03-23 Intel Corporation Techniques in phase-lock loop configuration in a computing device

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JPS60197015A (ja) 1984-03-21 1985-10-05 Nec Corp 位相同期発振器
JPS63305619A (ja) * 1987-06-08 1988-12-13 Mitsubishi Electric Corp Pllシンセサイザ装置
JPH01120133U (de) * 1988-02-06 1989-08-15
JPH03190428A (ja) * 1989-12-20 1991-08-20 Matsushita Electric Ind Co Ltd 位相同期回路
JPH05145413A (ja) * 1991-11-20 1993-06-11 Nippon Denki Musen Denshi Kk 位相同期回路
JPH05199109A (ja) * 1992-01-20 1993-08-06 Ricoh Co Ltd Pll回路
JPH05227024A (ja) * 1992-02-12 1993-09-03 Sony Tektronix Corp Pll発振装置
US5483202A (en) * 1994-08-31 1996-01-09 Polaroid Corporation Compensated phase locked loop for generating a controlled output clock signal
JPH08125529A (ja) * 1994-10-20 1996-05-17 Fujitsu General Ltd Pll回路
GB2295930B (en) 1994-12-06 1999-11-24 Motorola Ltd Method and apparatus for implementing frequency hopping in a TDMA system
US5610558A (en) * 1995-11-03 1997-03-11 Motorola, Inc. Controlled tracking of oscillators in a circuit with multiple frequency sensitive elements
JPH10271002A (ja) * 1997-03-21 1998-10-09 Sony Corp 発振制御装置
US6049254A (en) * 1997-10-16 2000-04-11 Oasis Design, Inc. Phase-locked loop which can automatically adjust to and lock upon a variable input frequency
JPH11136124A (ja) * 1997-10-27 1999-05-21 Matsushita Electric Ind Co Ltd Pll回路
JPH11214992A (ja) * 1998-01-23 1999-08-06 Mitsubishi Electric Corp 周波数シンセサイザ
US6111442A (en) * 1998-03-09 2000-08-29 International Business Machines Corporation Phase-locked loop circuit with dynamic backup
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GB2363268B (en) 2000-06-08 2004-04-14 Mitel Corp Timing circuit with dual phase locked loops
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US6762634B1 (en) 2003-08-13 2004-07-13 Pericom Semiconductor Corp. Dual-loop PLL with DAC offset for frequency shift while maintaining input tracking
US7630468B2 (en) 2003-12-19 2009-12-08 Broadcom Corporation Dual-PLL signaling for maintaining synchronization in a communications system

Also Published As

Publication number Publication date
JP2008148346A (ja) 2008-06-26
US7602253B2 (en) 2009-10-13
TWI356592B (en) 2012-01-11
CN101202546A (zh) 2008-06-18
EP1933464A1 (de) 2008-06-18
KR101470990B1 (ko) 2014-12-12
TW200830719A (en) 2008-07-16
US20080136531A1 (en) 2008-06-12
EP1933464B1 (de) 2010-09-15
KR20080053902A (ko) 2008-06-16
CN101202546B (zh) 2012-12-26
JP5515216B2 (ja) 2014-06-11

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