DE602005018345D1 - Schaltung mit asynchroner/synchroner schnittstelle - Google Patents
Schaltung mit asynchroner/synchroner schnittstelleInfo
- Publication number
- DE602005018345D1 DE602005018345D1 DE602005018345T DE602005018345T DE602005018345D1 DE 602005018345 D1 DE602005018345 D1 DE 602005018345D1 DE 602005018345 T DE602005018345 T DE 602005018345T DE 602005018345 T DE602005018345 T DE 602005018345T DE 602005018345 D1 DE602005018345 D1 DE 602005018345D1
- Authority
- DE
- Germany
- Prior art keywords
- signal
- circuit
- data
- request
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04101794 | 2004-04-28 | ||
PCT/IB2005/051360 WO2005106687A1 (en) | 2004-04-28 | 2005-04-26 | Circuit with asynchronous/synchronous interface |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602005018345D1 true DE602005018345D1 (de) | 2010-01-28 |
Family
ID=34967721
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602005018345T Expired - Fee Related DE602005018345D1 (de) | 2004-04-28 | 2005-04-26 | Schaltung mit asynchroner/synchroner schnittstelle |
Country Status (7)
Country | Link |
---|---|
US (1) | US20070277053A1 (de) |
EP (1) | EP1745384B1 (de) |
JP (1) | JP2007535064A (de) |
CN (1) | CN100461147C (de) |
AT (1) | ATE452371T1 (de) |
DE (1) | DE602005018345D1 (de) |
WO (1) | WO2005106687A1 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2883117B1 (fr) * | 2005-03-08 | 2007-04-27 | Commissariat Energie Atomique | Architecture de noeud de communication dans un systeme de reseau sur puce globalement asynchrone. |
US20090115488A1 (en) * | 2007-11-06 | 2009-05-07 | Jordi Cortadella | Variability-Aware Asynchronous Scheme Based on Two-Phase Protocols Using a Gated Latch Enable Scheme |
CN101452398B (zh) * | 2007-12-05 | 2012-03-21 | 英业达股份有限公司 | 异步请求应答的通信方法 |
CN101477505B (zh) * | 2008-12-23 | 2012-11-21 | 无锡中星微电子有限公司 | 一种主、从设备之间通过总线传输数据的方法 |
DE102009031181B4 (de) * | 2009-06-29 | 2019-05-16 | Atmel Corp. | Schaltung eines Knotens, Verfahren zur Laufzeitmessung in einem Funknetz und Funknetz |
WO2011106016A1 (en) * | 2010-02-26 | 2011-09-01 | Hewlett-Packard Development Company, L.P. | Restoring stability to an unstable bus |
US8990466B2 (en) * | 2012-05-29 | 2015-03-24 | Infineon Technologies Austria Ag | Arbiter for asynchronous state machines |
US10505704B1 (en) * | 2015-08-02 | 2019-12-10 | Wave Computing, Inc. | Data uploading to asynchronous circuitry using circular buffer control |
CN106951804B (zh) * | 2017-03-03 | 2019-07-19 | 北京大学 | 一种异步与同步相结合的rfid数字芯片电路结构 |
CN108694146B (zh) * | 2017-04-11 | 2021-03-12 | 华大恒芯科技有限公司 | 一种异步/同步接口电路 |
CN107301444A (zh) * | 2017-05-25 | 2017-10-27 | 北京大学 | 一种超高频rfid编码电路 |
WO2020191669A1 (zh) * | 2019-03-27 | 2020-10-01 | 京东方科技集团股份有限公司 | 物联网系统、中央控制设备、应用设备以及通信方法 |
CN113204503A (zh) * | 2021-05-31 | 2021-08-03 | 北京欧铼德微电子技术有限公司 | 一种数据同步输出方法及电路 |
CN116842880A (zh) * | 2022-03-24 | 2023-10-03 | 华为技术有限公司 | 一种芯片、信号处理方法以及电子设备 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0260392A3 (de) * | 1986-09-19 | 1992-03-11 | International Business Machines Corporation | Ein-Ausgabeschnittstellensteuerung zum Verbinden eines synchronen Busses mit einem asynchronen Bus und Verfahren zur Operationsausführung auf den Bussen |
US5522048A (en) * | 1993-11-30 | 1996-05-28 | At&T Corp. | Low-power area-efficient and robust asynchronous-to-synchronous interface |
US6327667B1 (en) * | 1995-05-12 | 2001-12-04 | Compaq Computer Corporation | Apparatus and method for operating clock sensitive devices in multiple timing domains |
FI104858B (fi) * | 1995-05-29 | 2000-04-14 | Nokia Networks Oy | Menetelmä ja laitteisto asynkronisen väylän sovittamiseksi synkroniseen piiriin |
US5884100A (en) * | 1996-06-06 | 1999-03-16 | Sun Microsystems, Inc. | Low-latency, high-throughput, integrated cache coherent I/O system for a single-chip processor |
US6108778A (en) * | 1998-04-07 | 2000-08-22 | Micron Technology, Inc. | Device for blocking bus transactions during reset |
US6260152B1 (en) * | 1998-07-30 | 2001-07-10 | Siemens Information And Communication Networks, Inc. | Method and apparatus for synchronizing data transfers in a logic circuit having plural clock domains |
US6247082B1 (en) * | 1998-11-03 | 2001-06-12 | 3Com Corporation | Method and circuit for providing handshaking to transact information across multiple clock domains |
JP3523181B2 (ja) * | 2000-11-01 | 2004-04-26 | Necマイクロシステム株式会社 | 非同期バスインタフェース回路及びマイクロコンピュータ |
US20030135675A1 (en) * | 2002-01-17 | 2003-07-17 | Koninklijke Philips Electronics N.V. | Configurable synchronous or asynchronous bus interface |
US6950959B2 (en) * | 2002-02-12 | 2005-09-27 | Fulcrum Microystems Inc. | Techniques for facilitating conversion between asynchronous and synchronous domains |
KR100453071B1 (ko) * | 2003-01-18 | 2004-10-15 | 삼성전자주식회사 | 프로세서 버스 연결 장치 및 방법 |
JP3852437B2 (ja) * | 2003-11-19 | 2006-11-29 | セイコーエプソン株式会社 | 同期・非同期インターフェース回路及び電子機器 |
EP1714209B1 (de) * | 2004-01-13 | 2009-09-09 | Koninklijke Philips Electronics N.V. | Elektronsiche schaltung mit einer fifo-pipeline |
US7085874B2 (en) * | 2004-04-02 | 2006-08-01 | Arm Limited | Synchronous/asynchronous bridge circuit for improved transfer of data between two circuits |
-
2005
- 2005-04-26 US US11/568,244 patent/US20070277053A1/en not_active Abandoned
- 2005-04-26 EP EP05731772A patent/EP1745384B1/de not_active Not-in-force
- 2005-04-26 WO PCT/IB2005/051360 patent/WO2005106687A1/en not_active Application Discontinuation
- 2005-04-26 JP JP2007510218A patent/JP2007535064A/ja not_active Withdrawn
- 2005-04-26 CN CNB2005800133731A patent/CN100461147C/zh not_active Expired - Fee Related
- 2005-04-26 DE DE602005018345T patent/DE602005018345D1/de not_active Expired - Fee Related
- 2005-04-26 AT AT05731772T patent/ATE452371T1/de not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP1745384A1 (de) | 2007-01-24 |
CN100461147C (zh) | 2009-02-11 |
EP1745384B1 (de) | 2009-12-16 |
WO2005106687A1 (en) | 2005-11-10 |
US20070277053A1 (en) | 2007-11-29 |
JP2007535064A (ja) | 2007-11-29 |
ATE452371T1 (de) | 2010-01-15 |
CN1947109A (zh) | 2007-04-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |