DE602005016675D1 - Bussteuerung - Google Patents

Bussteuerung

Info

Publication number
DE602005016675D1
DE602005016675D1 DE602005016675T DE602005016675T DE602005016675D1 DE 602005016675 D1 DE602005016675 D1 DE 602005016675D1 DE 602005016675 T DE602005016675 T DE 602005016675T DE 602005016675 T DE602005016675 T DE 602005016675T DE 602005016675 D1 DE602005016675 D1 DE 602005016675D1
Authority
DE
Germany
Prior art keywords
bus control
bus
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005016675T
Other languages
English (en)
Inventor
Lee W Atkinson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Development Co LP
Original Assignee
Hewlett Packard Development Co LP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Development Co LP filed Critical Hewlett Packard Development Co LP
Publication of DE602005016675D1 publication Critical patent/DE602005016675D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4086—Bus impedance matching, e.g. termination
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Networks Using Active Elements (AREA)
  • Direct Current Feeding And Distribution (AREA)
DE602005016675T 2004-06-01 2005-06-01 Bussteuerung Active DE602005016675D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/858,129 US7173450B2 (en) 2004-06-01 2004-06-01 Bus controller
PCT/US2005/019026 WO2005119471A2 (en) 2004-06-01 2005-06-01 Bus controller

Publications (1)

Publication Number Publication Date
DE602005016675D1 true DE602005016675D1 (de) 2009-10-29

Family

ID=34982534

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005016675T Active DE602005016675D1 (de) 2004-06-01 2005-06-01 Bussteuerung

Country Status (6)

Country Link
US (1) US7173450B2 (de)
EP (1) EP1754163B1 (de)
JP (1) JP2008501197A (de)
DE (1) DE602005016675D1 (de)
TW (1) TWI365379B (de)
WO (1) WO2005119471A2 (de)

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US7099416B2 (en) * 2002-02-06 2006-08-29 Broadcom Corporation Single ended termination of clock for dual link DVI receiver
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US7439760B2 (en) 2005-12-19 2008-10-21 Rambus Inc. Configurable on-die termination
US7486104B2 (en) 2006-06-02 2009-02-03 Rambus Inc. Integrated circuit with graduated on-die termination
US7945793B2 (en) * 2006-08-11 2011-05-17 Intel Corporation Interface frequency modulation to allow non-terminated operation and power reduction
KR100866601B1 (ko) * 2006-12-04 2008-11-03 삼성전자주식회사 반도체 장치의 종단 저항을 제어할 수 있는 장치 및 방법
WO2008079911A1 (en) 2006-12-21 2008-07-03 Rambus Inc. Dynamic on-die termination of address and command signals
US8069354B2 (en) * 2007-08-14 2011-11-29 Mips Technologies, Inc. Power management for system having one or more integrated circuits
US7996626B2 (en) * 2007-12-13 2011-08-09 Dell Products L.P. Snoop filter optimization
JP4806696B2 (ja) * 2008-05-23 2011-11-02 東芝テック株式会社 情報処理装置
JP5287858B2 (ja) * 2008-07-31 2013-09-11 富士通株式会社 データ転送装置、データ送信装置、データ受信装置およびデータ転送方法
US20100268897A1 (en) * 2009-04-16 2010-10-21 Keishi Okamoto Memory device and memory device controller
EP2583280A4 (de) 2010-06-17 2014-06-18 Rambus Inc Balancierte on-chip-beendigung
WO2011161782A1 (ja) 2010-06-23 2011-12-29 富士通株式会社 マルチコアシステムおよび外部入出力バス制御方法
US9224430B2 (en) * 2011-07-27 2015-12-29 Micron Technology, Inc. Devices, methods, and systems supporting on unit termination
US9304570B2 (en) 2011-12-15 2016-04-05 Intel Corporation Method, apparatus, and system for energy efficiency and energy conservation including power and performance workload-based balancing between multiple processing elements
US8581622B1 (en) * 2012-05-16 2013-11-12 Hitachi, Ltd. Semiconductor device
US9088445B2 (en) 2013-03-07 2015-07-21 Qualcomm Incorporated Method and apparatus for selectively terminating signals on a bidirectional bus based on bus speed
US9740643B2 (en) 2013-06-20 2017-08-22 Apple Inc. Systems and methods for recovering higher speed communication between devices
US9214939B2 (en) * 2013-12-02 2015-12-15 Texas Instruments Deutschland Gmbh Adaptive bus termination apparatus and methods
TWI546654B (zh) 2014-01-29 2016-08-21 群暉科技股份有限公司 電子裝置以及電子裝置的操作方法
WO2015193992A1 (ja) * 2014-06-18 2015-12-23 ゼンテルジャパン株式会社 半導体回路装置及び半導体メモリシステム
DE102014222661A1 (de) * 2014-11-06 2016-05-12 Siemens Schweiz Ag Anordnung und Verfahren zur Optimierung der Übertragung von digitalen Daten in Zweidraht-Kommunikations-Netzwerken
US10050610B2 (en) * 2015-03-10 2018-08-14 Qualcomm Incorporated Clock distribution schemes with wide operating voltage ranges
KR20220112322A (ko) * 2021-02-03 2022-08-11 삼성전자주식회사 송신 회로의 출력 임피던스를 조절할 수 있는 인터페이스 회로 및 이를 포함하는 이미지 센서

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US4371181A (en) * 1980-04-29 1983-02-01 Monigold Ray A Collision resistant auxiliary fuel system
US4980836A (en) * 1988-10-14 1990-12-25 Compaq Computer Corporation Apparatus for reducing computer system power consumption
JPH0777345B2 (ja) 1988-11-04 1995-08-16 三菱電機株式会社 半導体装置
US5247655A (en) * 1989-11-07 1993-09-21 Chips And Technologies, Inc. Sleep mode refresh apparatus
US5089722A (en) 1990-04-02 1992-02-18 Motorola, Inc. High speed output buffer circuit with overlap current control
US5153457A (en) 1990-12-12 1992-10-06 Texas Instruments Incorporated Output buffer with di/dt and dv/dt and tri-state control
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US5239652A (en) * 1991-02-04 1993-08-24 Apple Computer, Inc. Arrangement for reducing computer power consumption by turning off the microprocessor when inactive
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US5838983A (en) * 1996-08-20 1998-11-17 Compaq Computer Corporation Portable computer with low power audio CD-player
JPH1020974A (ja) * 1996-07-03 1998-01-23 Fujitsu Ltd バス構造及び入出力バッファ
US5732027A (en) 1996-12-30 1998-03-24 Cypress Semiconductor Corporation Memory having selectable output strength
JPH1125678A (ja) 1997-06-27 1999-01-29 Samsung Electron Co Ltd 出力ドライバ及び半導体メモリ装置
US6314180B1 (en) * 1997-12-11 2001-11-06 Paradyne Corporation System and method for providing a frequency dependent synthetic termination
US6054881A (en) 1998-01-09 2000-04-25 Advanced Micro Devices, Inc. Input/output (I/O) buffer selectively providing resistive termination for a transmission line coupled thereto
DE19825258B4 (de) * 1998-06-05 2005-11-17 Telefonaktiebolaget Lm Ericsson (Publ) Ausgangspufferschaltkreis zum Übertragen von digitalen Signalen über eine Übertragungsleitung mit Preemphasis
US6177810B1 (en) 1998-12-17 2001-01-23 Siemens Aktiengesellschaft Adjustable strength driver circuit and method of adjustment
US6204683B1 (en) * 1999-05-18 2001-03-20 Intel Corporation Apparatus and method for reducing crosstalk in an integrated circuit which includes a signal bus
US6529589B1 (en) * 1999-05-20 2003-03-04 3Com Corporation Method and system for monitoring and controlling automation equipment by modem
US6292010B1 (en) 2000-02-02 2001-09-18 Teradyne, Inc. Dynamic pin driver combining high voltage mode and high speed mode
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KR100394586B1 (ko) 2000-11-30 2003-08-14 삼성전자주식회사 임피던스 제어회로
TW588235B (en) * 2001-04-02 2004-05-21 Via Tech Inc Motherboard with less power consumption
KR100380025B1 (ko) 2001-04-18 2003-04-18 삼성전자주식회사 반도체 메모리 장치에 적용되는 입력 버퍼의 노이즈면역성 향상장치
US6937111B2 (en) * 2001-11-21 2005-08-30 Hynix Semiconductor Inc. Device and system having self-terminated driver and active terminator for high speed interface
US6894691B2 (en) * 2002-05-01 2005-05-17 Dell Products L.P. Dynamic switching of parallel termination for power management with DDR memory
KR100502408B1 (ko) * 2002-06-21 2005-07-19 삼성전자주식회사 액티브 터미네이션을 내장한 메모리 장치의 파워-업시퀀스를 제어하는 메모리 시스템과 그 파워-업 및 초기화방법
US6707280B1 (en) 2002-09-09 2004-03-16 Arques Technology, Inc. Bidirectional voltage regulator sourcing and sinking current for line termination

Also Published As

Publication number Publication date
WO2005119471A3 (en) 2006-04-20
WO2005119471A2 (en) 2005-12-15
EP1754163B1 (de) 2009-09-16
TWI365379B (en) 2012-06-01
TW200604824A (en) 2006-02-01
EP1754163A2 (de) 2007-02-21
US7173450B2 (en) 2007-02-06
JP2008501197A (ja) 2008-01-17
US20050264316A1 (en) 2005-12-01

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Legal Events

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8364 No opposition during term of opposition