DE60114270D1 - Transistor für elektrostatischen Entladungsschutz - Google Patents

Transistor für elektrostatischen Entladungsschutz

Info

Publication number
DE60114270D1
DE60114270D1 DE60114270T DE60114270T DE60114270D1 DE 60114270 D1 DE60114270 D1 DE 60114270D1 DE 60114270 T DE60114270 T DE 60114270T DE 60114270 T DE60114270 T DE 60114270T DE 60114270 D1 DE60114270 D1 DE 60114270D1
Authority
DE
Germany
Prior art keywords
drain
turn
gate
trench
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60114270T
Other languages
English (en)
Other versions
DE60114270T2 (de
Inventor
Jun Cai
Keng Foo Lo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Singapore Pte Ltd
Original Assignee
Chartered Semiconductor Manufacturing Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chartered Semiconductor Manufacturing Pte Ltd filed Critical Chartered Semiconductor Manufacturing Pte Ltd
Application granted granted Critical
Publication of DE60114270D1 publication Critical patent/DE60114270D1/de
Publication of DE60114270T2 publication Critical patent/DE60114270T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • H01L27/027—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path
    • H01L27/0277—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path involving a parasitic bipolar transistor triggered by the local electrical biasing of the layer acting as base of said parasitic bipolar transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
DE60114270T 2000-03-06 2001-02-08 Transistor für elektrostatischen Entladungsschutz Expired - Lifetime DE60114270T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US519838 1995-08-25
US09/519,838 US6310380B1 (en) 2000-03-06 2000-03-06 Electrostatic discharge protection transistor structure with a trench extending through the source or drain silicide layers

Publications (2)

Publication Number Publication Date
DE60114270D1 true DE60114270D1 (de) 2005-12-01
DE60114270T2 DE60114270T2 (de) 2006-04-27

Family

ID=24070002

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60114270T Expired - Lifetime DE60114270T2 (de) 2000-03-06 2001-02-08 Transistor für elektrostatischen Entladungsschutz

Country Status (7)

Country Link
US (1) US6310380B1 (de)
EP (1) EP1132971B1 (de)
JP (1) JP2001284583A (de)
AT (1) ATE308118T1 (de)
DE (1) DE60114270T2 (de)
SG (1) SG88771A1 (de)
TW (1) TW483145B (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW522542B (en) * 2000-11-09 2003-03-01 United Microelectronics Corp Electrostatic discharge device structure
US6734504B1 (en) 2002-04-05 2004-05-11 Cypress Semiconductor Corp. Method of providing HBM protection with a decoupled HBM structure
US6830966B2 (en) * 2002-06-12 2004-12-14 Chartered Semiconductor Manufacturing Ltd. Fully silicided NMOS device for electrostatic discharge protection
JP4170210B2 (ja) 2003-12-19 2008-10-22 Ｎｅｃエレクトロニクス株式会社 半導体装置
KR100709830B1 (ko) 2005-02-14 2007-04-23 주식회사 케이이씨 정전기 방전 보호 소자 및 그 제조 방법
US7646063B1 (en) 2005-06-15 2010-01-12 Pmc-Sierra, Inc. Compact CMOS ESD layout techniques with either fully segmented salicide ballasting (FSSB) in the source and/or drain regions
KR100884201B1 (ko) 2007-07-24 2009-02-18 주식회사 동부하이텍 반도체 소자
KR100940625B1 (ko) * 2007-08-31 2010-02-05 주식회사 동부하이텍 엘씨디 구동 칩 및 그 제조방법
US8354710B2 (en) 2008-08-08 2013-01-15 Infineon Technologies Ag Field-effect device and manufacturing method thereof
JP5546191B2 (ja) * 2009-09-25 2014-07-09 セイコーインスツル株式会社 半導体装置
JP5511395B2 (ja) * 2010-01-06 2014-06-04 セイコーインスツル株式会社 半導体装置
JP5455801B2 (ja) * 2010-06-10 2014-03-26 株式会社東芝 半導体装置
US8536648B2 (en) 2011-02-03 2013-09-17 Infineon Technologies Ag Drain extended field effect transistors and methods of formation thereof

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2626229B2 (ja) * 1989-10-12 1997-07-02 日本電気株式会社 半導体入力保護装置
JPH03155679A (ja) * 1989-11-14 1991-07-03 Sanyo Electric Co Ltd 縦型ｍｏｓｆｅｔ
GB2242781A (en) * 1990-04-06 1991-10-09 Koninkl Philips Electronics Nv A semiconductor device
US5504362A (en) * 1992-12-22 1996-04-02 International Business Machines Corporation Electrostatic discharge protection device
US5760448A (en) 1993-12-27 1998-06-02 Sharp Kabushiki Kaisha Semiconductor device and a method for manufacturing the same
KR0120572B1 (ko) * 1994-05-04 1997-10-20 김주용 반도체 소자 및 그 제조방법
US5491099A (en) * 1994-08-29 1996-02-13 United Microelectronics Corporation Method of making silicided LDD with recess in semiconductor substrate
KR100214855B1 (ko) * 1995-12-30 1999-08-02 김영환 정전기 방지용 트랜지스터 및 그의 제조방법
US5869879A (en) * 1996-12-06 1999-02-09 Advanced Micro Devices, Inc. CMOS integrated circuit having a sacrificial metal spacer for producing graded NMOS source/drain junctions dissimilar from PMOS source/drain junctions
JP3144330B2 (ja) * 1996-12-26 2001-03-12 日本電気株式会社 半導体装置
US5982600A (en) 1998-04-20 1999-11-09 Macronix International Co., Ltd. Low-voltage triggering electrostatic discharge protection

Also Published As

Publication number Publication date
DE60114270T2 (de) 2006-04-27
TW483145B (en) 2002-04-11
JP2001284583A (ja) 2001-10-12
EP1132971A3 (de) 2002-01-16
US6310380B1 (en) 2001-10-30
EP1132971A2 (de) 2001-09-12
ATE308118T1 (de) 2005-11-15
SG88771A1 (en) 2002-05-21
EP1132971B1 (de) 2005-10-26

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