DE60108082D1 - Verfahren zu Durchführung einer Ausrichtungsmessung von zwei Mustern in unterschiedlichen Schichten eines Halbleiterwafers - Google Patents

Verfahren zu Durchführung einer Ausrichtungsmessung von zwei Mustern in unterschiedlichen Schichten eines Halbleiterwafers

Info

Publication number
DE60108082D1
DE60108082D1 DE60108082T DE60108082T DE60108082D1 DE 60108082 D1 DE60108082 D1 DE 60108082D1 DE 60108082 T DE60108082 T DE 60108082T DE 60108082 T DE60108082 T DE 60108082T DE 60108082 D1 DE60108082 D1 DE 60108082D1
Authority
DE
Germany
Prior art keywords
alignment
exposure
measurement
field
patterns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60108082T
Other languages
English (en)
Other versions
DE60108082T2 (de
Inventor
Rolf Heine
Sebastian Schmidt
Thorsten Schedel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of DE60108082D1 publication Critical patent/DE60108082D1/de
Application granted granted Critical
Publication of DE60108082T2 publication Critical patent/DE60108082T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment
    • G03F9/7046—Strategy, e.g. mark, sensor or wavelength selection
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073—Alignment marks and their environment
    • G03F9/7076—Mark details, e.g. phase grating mark, temporary mark
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/0002—Inspection of images, e.g. flaw detection
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/0002—Inspection of images, e.g. flaw detection
    • G06T7/0004—Industrial image inspection
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/30—Determination of transform parameters for the alignment of images, i.e. image registration
    • G06T7/33—Determination of transform parameters for the alignment of images, i.e. image registration using feature-based methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/30—Subject of image; Context of image processing
    • G06T2207/30108—Industrial image inspection
    • G06T2207/30148—Semiconductor; IC; Wafer
DE60108082T 2001-05-14 2001-05-14 Verfahren zu Durchführung einer Ausrichtungsmessung von zwei Mustern in unterschiedlichen Schichten eines Halbleiterwafers Expired - Fee Related DE60108082T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP01111670A EP1258834B1 (de) 2001-05-14 2001-05-14 Verfahren zu Durchführung einer Ausrichtungsmessung von zwei Mustern in unterschiedlichen Schichten eines Halbleiterwafers

Publications (2)

Publication Number Publication Date
DE60108082D1 true DE60108082D1 (de) 2005-02-03
DE60108082T2 DE60108082T2 (de) 2005-10-13

Family

ID=8177420

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60108082T Expired - Fee Related DE60108082T2 (de) 2001-05-14 2001-05-14 Verfahren zu Durchführung einer Ausrichtungsmessung von zwei Mustern in unterschiedlichen Schichten eines Halbleiterwafers

Country Status (9)

Country Link
US (1) US6908775B2 (de)
EP (1) EP1258834B1 (de)
JP (1) JP2004531063A (de)
KR (1) KR100540629B1 (de)
AT (1) ATE286284T1 (de)
DE (1) DE60108082T2 (de)
IL (1) IL158875A0 (de)
TW (1) TW564510B (de)
WO (1) WO2002093485A1 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6864493B2 (en) 2001-05-30 2005-03-08 Hitachi, Ltd. Charged particle beam alignment method and charged particle beam apparatus
US20050095515A1 (en) * 2003-08-29 2005-05-05 Inficon Lt, Inc. Methods and systems for processing overlay data
JP4289961B2 (ja) * 2003-09-26 2009-07-01 キヤノン株式会社 位置決め装置
DE10345466A1 (de) * 2003-09-30 2005-04-28 Infineon Technologies Ag Verfahren zur Erfassung von Plazierungsfehlern von Schaltungsmustern bei der Übertragung mittels einer Maske in Schichten eines Substrats eines Halbleiterwafers
JP4295748B2 (ja) * 2004-06-21 2009-07-15 アプライド マテリアルズ イスラエル リミテッド 走査ビームアレイを使用する複数の重要領域を含む対象物を走査する方法
US7586609B2 (en) * 2005-04-21 2009-09-08 Macronix International Co., Ltd. Method for analyzing overlay errors
KR100598988B1 (ko) * 2005-05-18 2006-07-12 주식회사 하이닉스반도체 오버레이 버니어 및 이를 이용한 반도체소자의 제조방법
JP2006337631A (ja) * 2005-06-01 2006-12-14 Mitsubishi Electric Corp 検査方法及びこれを用いた液晶表示装置の製造方法
JP2007103658A (ja) * 2005-10-04 2007-04-19 Canon Inc 露光方法および装置ならびにデバイス製造方法
KR100790826B1 (ko) * 2006-06-30 2008-01-02 삼성전자주식회사 오버레이 계측방법 및 그가 사용되는 반도체 제조설비의관리시스템
KR101305948B1 (ko) * 2007-12-10 2013-09-12 삼성전자주식회사 기판 정렬 방법 및 이를 수행하기 위한 장치
KR101718359B1 (ko) * 2010-11-29 2017-04-04 삼성전자주식회사 기판 정렬 방법 및 이를 수행하기 위한 장치
US8730475B2 (en) * 2007-12-10 2014-05-20 Samsung Electronics Co., Ltd. Method of aligning a substrate
US9134627B2 (en) * 2011-12-16 2015-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Multiple-patterning overlay decoupling method
US9164398B2 (en) * 2013-02-27 2015-10-20 Taiwan Semiconductor Manufacturing Co., Ltd. Overlay metrology method
US9176396B2 (en) 2013-02-27 2015-11-03 Taiwan Semiconductor Manufacturing Co., Ltd. Overlay sampling methodology
JP6381197B2 (ja) * 2013-10-31 2018-08-29 キヤノン株式会社 計測装置、計測方法、リソグラフィ装置、及び物品製造方法
US9633915B1 (en) * 2016-03-01 2017-04-25 Globalfoundries Inc. Method of using dummy patterns for overlay target design and overlay control
US9754895B1 (en) 2016-03-07 2017-09-05 Micron Technology, Inc. Methods of forming semiconductor devices including determining misregistration between semiconductor levels and related apparatuses
EP3404488A1 (de) * 2017-05-19 2018-11-21 ASML Netherlands B.V. Verfahren zur messung eines ziels, metrologievorrichtung, lithographiezelle und ziel
CN111354670B (zh) * 2018-12-20 2023-05-26 夏泰鑫半导体(青岛)有限公司 对准方法、对准系统及计算机可读存储介质
CN110088920B (zh) * 2019-03-19 2022-07-22 京东方科技集团股份有限公司 转印方法和转印装置
CN111240162B (zh) * 2020-03-10 2022-07-15 上海华力微电子有限公司 改善光刻机对准的方法
CN113823581B (zh) * 2020-06-19 2023-09-22 长鑫存储技术有限公司 半导体工艺生产线派货方法、存储介质以及半导体设备
CN111900116A (zh) * 2020-06-22 2020-11-06 中国科学院微电子研究所 晶圆的对准方法及对准系统
US11635680B2 (en) 2020-08-14 2023-04-25 Changxin Memory Technologies, Inc. Overlay pattern

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5621913A (en) * 1992-05-15 1997-04-15 Micron Technology, Inc. System with chip to chip communication
US5621813A (en) * 1993-01-14 1997-04-15 Ultratech Stepper, Inc. Pattern recognition alignment system
US6181302B1 (en) * 1996-04-24 2001-01-30 C. Macgill Lynde Marine navigation binoculars with virtual display superimposing real world image
US6023338A (en) * 1996-07-12 2000-02-08 Bareket; Noah Overlay alignment measurement of wafers
KR19980030438A (ko) * 1996-10-29 1998-07-25 김영환 반도체 버어니어 구조 및 그것을 이용한 오버레이 정확도 측정방법
JP3757551B2 (ja) * 1997-06-25 2006-03-22 ソニー株式会社 マスクパターン作成方法およびこの方法により形成されたマスク
US6077756A (en) * 1998-04-24 2000-06-20 Vanguard International Semiconductor Overlay target pattern and algorithm for layer-to-layer overlay metrology for semiconductor processing
US6043134A (en) * 1998-08-28 2000-03-28 Micron Technology, Inc. Semiconductor wafer alignment processes
US6068954A (en) * 1998-09-01 2000-05-30 Micron Technology, Inc. Semiconductor wafer alignment methods
US6357131B1 (en) * 1999-12-20 2002-03-19 Taiwan Semiconductor Manufacturing Company Overlay reliability monitor
US6486954B1 (en) * 2000-09-01 2002-11-26 Kla-Tencor Technologies Corporation Overlay alignment measurement mark

Also Published As

Publication number Publication date
JP2004531063A (ja) 2004-10-07
ATE286284T1 (de) 2005-01-15
TW564510B (en) 2003-12-01
US6908775B2 (en) 2005-06-21
US20040101984A1 (en) 2004-05-27
EP1258834B1 (de) 2004-12-29
DE60108082T2 (de) 2005-10-13
EP1258834A1 (de) 2002-11-20
WO2002093485A1 (en) 2002-11-21
KR20040029993A (ko) 2004-04-08
KR100540629B1 (ko) 2006-01-11
IL158875A0 (en) 2004-05-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee