DE60102777T2 - Vorrichtung und verfahren zur verminderung von datenschreibverkehr in prozessoren mit ausnahmeroutinen - Google Patents

Vorrichtung und verfahren zur verminderung von datenschreibverkehr in prozessoren mit ausnahmeroutinen Download PDF

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Publication number
DE60102777T2
DE60102777T2 DE2001602777 DE60102777T DE60102777T2 DE 60102777 T2 DE60102777 T2 DE 60102777T2 DE 2001602777 DE2001602777 DE 2001602777 DE 60102777 T DE60102777 T DE 60102777T DE 60102777 T2 DE60102777 T2 DE 60102777T2
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DE
Germany
Prior art keywords
instruction
result
pipeline
register file
command
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE2001602777
Other languages
German (de)
English (en)
Other versions
DE60102777D1 (de
Inventor
Paul Stravers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Application granted granted Critical
Publication of DE60102777D1 publication Critical patent/DE60102777D1/de
Publication of DE60102777T2 publication Critical patent/DE60102777T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Computer And Data Communications (AREA)
DE2001602777 2000-02-16 2001-01-24 Vorrichtung und verfahren zur verminderung von datenschreibverkehr in prozessoren mit ausnahmeroutinen Expired - Lifetime DE60102777T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/505,986 US6851044B1 (en) 2000-02-16 2000-02-16 System and method for eliminating write backs with buffer for exception processing
US505986 2000-02-16
PCT/EP2001/000775 WO2001061469A2 (en) 2000-02-16 2001-01-24 Apparatus and method for reducing register write traffic in processors with exception routines

Publications (2)

Publication Number Publication Date
DE60102777D1 DE60102777D1 (de) 2004-05-19
DE60102777T2 true DE60102777T2 (de) 2009-10-08

Family

ID=24012699

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2001602777 Expired - Lifetime DE60102777T2 (de) 2000-02-16 2001-01-24 Vorrichtung und verfahren zur verminderung von datenschreibverkehr in prozessoren mit ausnahmeroutinen

Country Status (6)

Country Link
US (1) US6851044B1 (enExample)
EP (1) EP1208424B1 (enExample)
JP (1) JP2004508607A (enExample)
AT (1) ATE264520T1 (enExample)
DE (1) DE60102777T2 (enExample)
WO (1) WO2001061469A2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2003245225A1 (en) 2002-07-19 2004-02-09 Xelerated Ab Method and apparatus for pipelined processing of data packets
US20060155885A1 (en) * 2002-07-19 2006-07-13 Joachim Roos Processor and a method in the processor, the processor comprising a programmable pipeline and at least one interface engine
US7290153B2 (en) * 2004-11-08 2007-10-30 Via Technologies, Inc. System, method, and apparatus for reducing power consumption in a microprocessor
US8250231B2 (en) 2004-12-22 2012-08-21 Marvell International Ltd. Method for reducing buffer capacity in a pipeline processor
WO2007057831A1 (en) * 2005-11-15 2007-05-24 Nxp B.V. Data processing method and apparatus
CN104216681B (zh) * 2013-05-31 2018-02-13 华为技术有限公司 一种cpu指令处理方法和处理器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228497A (en) * 1977-11-17 1980-10-14 Burroughs Corporation Template micromemory structure for a pipelined microprogrammable data processing system
AU553416B2 (en) * 1984-02-24 1986-07-17 Fujitsu Limited Pipeline processing
US6370623B1 (en) 1988-12-28 2002-04-09 Philips Electronics North America Corporation Multiport register file to accommodate data of differing lengths
JPH0719222B2 (ja) * 1989-03-30 1995-03-06 日本電気株式会社 ストアバッフア
AU629007B2 (en) 1989-12-29 1992-09-24 Sun Microsystems, Inc. Apparatus for accelerating store operations in a risc computer
US5222240A (en) 1990-02-14 1993-06-22 Intel Corporation Method and apparatus for delaying writing back the results of instructions to a processor
GB2241801B (en) 1990-03-05 1994-03-16 Intel Corp Data bypass structure in a register file on a microprocessor chip to ensure data integrity
JPH04367936A (ja) * 1991-06-17 1992-12-21 Mitsubishi Electric Corp スーパースカラープロセッサ
US5471626A (en) * 1992-05-06 1995-11-28 International Business Machines Corporation Variable stage entry/exit instruction pipeline
US5898882A (en) * 1993-01-08 1999-04-27 International Business Machines Corporation Method and system for enhanced instruction dispatch in a superscalar processor system utilizing independently accessed intermediate storage
JPH08212083A (ja) 1995-02-07 1996-08-20 Oki Electric Ind Co Ltd 割り込み処理装置
JP3490191B2 (ja) 1995-06-30 2004-01-26 株式会社東芝 計算機
US20020161985A1 (en) * 1999-10-01 2002-10-31 Gearty Margaret Rose Microcomputer/floating point processor interface and method for synchronization of cpu and fpu pipelines

Also Published As

Publication number Publication date
US6851044B1 (en) 2005-02-01
EP1208424B1 (en) 2004-04-14
JP2004508607A (ja) 2004-03-18
EP1208424A2 (en) 2002-05-29
WO2001061469A2 (en) 2001-08-23
WO2001061469A3 (en) 2002-02-21
ATE264520T1 (de) 2004-04-15
DE60102777D1 (de) 2004-05-19

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Legal Events

Date Code Title Description
8332 No legal effect for de
8370 Indication related to discontinuation of the patent is to be deleted
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL