GB2241801B - Data bypass structure in a register file on a microprocessor chip to ensure data integrity - Google Patents

Data bypass structure in a register file on a microprocessor chip to ensure data integrity

Info

Publication number
GB2241801B
GB2241801B GB9101089A GB9101089A GB2241801B GB 2241801 B GB2241801 B GB 2241801B GB 9101089 A GB9101089 A GB 9101089A GB 9101089 A GB9101089 A GB 9101089A GB 2241801 B GB2241801 B GB 2241801B
Authority
GB
United Kingdom
Prior art keywords
register file
microprocessor chip
data
bypass structure
ensure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9101089A
Other versions
GB2241801A (en
GB9101089D0 (en
Inventor
James M Arnold
Glenn J Hinton
Frank S Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of GB9101089D0 publication Critical patent/GB9101089D0/en
Publication of GB2241801A publication Critical patent/GB2241801A/en
Application granted granted Critical
Publication of GB2241801B publication Critical patent/GB2241801B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30141—Implementation provisions of register files, e.g. ports
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G06F9/3828—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage with global bypass, e.g. between pipelines, between clusters
GB9101089A 1990-03-05 1991-01-17 Data bypass structure in a register file on a microprocessor chip to ensure data integrity Expired - Fee Related GB2241801B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US48825490A 1990-03-05 1990-03-05

Publications (3)

Publication Number Publication Date
GB9101089D0 GB9101089D0 (en) 1991-02-27
GB2241801A GB2241801A (en) 1991-09-11
GB2241801B true GB2241801B (en) 1994-03-16

Family

ID=23938975

Family Applications (2)

Application Number Title Priority Date Filing Date
GB9101089A Expired - Fee Related GB2241801B (en) 1990-03-05 1991-01-17 Data bypass structure in a register file on a microprocessor chip to ensure data integrity
GB9320089A Pending GB9320089D0 (en) 1990-03-05 1993-09-29 Method of loading a register file on a microprocessor chip to ensure data integrity

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB9320089A Pending GB9320089D0 (en) 1990-03-05 1993-09-29 Method of loading a register file on a microprocessor chip to ensure data integrity

Country Status (2)

Country Link
JP (1) JPH04219825A (en)
GB (2) GB2241801B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8019975B2 (en) 1992-09-29 2011-09-13 Seiko-Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0663083B1 (en) * 1992-09-29 2000-12-20 Seiko Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor
US5974538A (en) * 1997-02-21 1999-10-26 Wilmot, Ii; Richard Byron Method and apparatus for annotating operands in a computer system with source instruction identifiers
US6851044B1 (en) 2000-02-16 2005-02-01 Koninklijke Philips Electronics N.V. System and method for eliminating write backs with buffer for exception processing
US6862677B1 (en) 2000-02-16 2005-03-01 Koninklijke Philips Electronics N.V. System and method for eliminating write back to register using dead field indicator
CN114143195B (en) * 2021-11-19 2023-05-23 烽火通信科技股份有限公司 Data packet processing device and method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2153558A (en) * 1984-01-24 1985-08-21 Int Computers Ltd Pipelined data processing
EP0155211A2 (en) * 1984-02-24 1985-09-18 Fujitsu Limited System for by-pass control in pipeline operation of computer
US4638429A (en) * 1983-12-19 1987-01-20 Hitachi, Ltd. Data processing apparatus for processing operand store conflict
EP0331191A2 (en) * 1988-03-04 1989-09-06 Nec Corporation Information processing system capable of carrying out advanced execution

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4638429A (en) * 1983-12-19 1987-01-20 Hitachi, Ltd. Data processing apparatus for processing operand store conflict
GB2153558A (en) * 1984-01-24 1985-08-21 Int Computers Ltd Pipelined data processing
EP0155211A2 (en) * 1984-02-24 1985-09-18 Fujitsu Limited System for by-pass control in pipeline operation of computer
EP0331191A2 (en) * 1988-03-04 1989-09-06 Nec Corporation Information processing system capable of carrying out advanced execution

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8019975B2 (en) 1992-09-29 2011-09-13 Seiko-Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor

Also Published As

Publication number Publication date
GB2241801A (en) 1991-09-11
GB9320089D0 (en) 1993-11-17
GB9101089D0 (en) 1991-02-27
JPH04219825A (en) 1992-08-10

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19950117