DE60041546D1 - PLL-Schaltung mit reduzierter Einschwingzeit - Google Patents

PLL-Schaltung mit reduzierter Einschwingzeit

Info

Publication number
DE60041546D1
DE60041546D1 DE60041546T DE60041546T DE60041546D1 DE 60041546 D1 DE60041546 D1 DE 60041546D1 DE 60041546 T DE60041546 T DE 60041546T DE 60041546 T DE60041546 T DE 60041546T DE 60041546 D1 DE60041546 D1 DE 60041546D1
Authority
DE
Germany
Prior art keywords
pll circuit
current source
constant current
convergence
input voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60041546T
Other languages
English (en)
Inventor
Taizo Yamawaki
Satoshi Tanaka
Norio Hayashi
Kazuo Watanabe
Robert Astle Henshaw
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TTPCom Ltd
Renesas Electronics Corp
Original Assignee
TTP Communications Ltd
TTPCom Ltd
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TTP Communications Ltd, TTPCom Ltd, Renesas Technology Corp filed Critical TTP Communications Ltd
Application granted granted Critical
Publication of DE60041546D1 publication Critical patent/DE60041546D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/104—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional signal from outside the loop for setting or controlling a parameter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/12—Indirect frequency synthesis using a mixer in the phase-locked loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Transceivers (AREA)
DE60041546T 2000-12-28 2000-12-28 PLL-Schaltung mit reduzierter Einschwingzeit Expired - Lifetime DE60041546D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP00311746A EP1220453B1 (de) 2000-12-28 2000-12-28 PLL-Schaltung mit reduzierter Einschwingzeit

Publications (1)

Publication Number Publication Date
DE60041546D1 true DE60041546D1 (de) 2009-03-26

Family

ID=8173496

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60041546T Expired - Lifetime DE60041546D1 (de) 2000-12-28 2000-12-28 PLL-Schaltung mit reduzierter Einschwingzeit

Country Status (8)

Country Link
US (2) US6912380B2 (de)
EP (1) EP1220453B1 (de)
JP (1) JP4057791B2 (de)
KR (1) KR100746143B1 (de)
CN (1) CN1232145C (de)
AT (1) ATE422729T1 (de)
DE (1) DE60041546D1 (de)
TW (1) TW527778B (de)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI113817B (fi) * 2002-05-27 2004-06-15 Nokia Corp Parannettu piirijärjestely vaihelukoksi, vaihelukon toteuttava integroitupiiri, vaihelukkoa hyödyntävä menetelmä ja solukkoverkon päätelaite
US7103327B2 (en) * 2002-06-18 2006-09-05 Broadcom, Corp. Single side band transmitter having reduced DC offset
GB0322538D0 (en) * 2003-09-26 2003-10-29 Univ Belfast Phase conjugate circuit
US7543163B2 (en) * 2005-01-05 2009-06-02 Exar Corporation Low power method of monitoring and of responsively initiating higher powered intelligent response to detected change of condition
TWI470934B (zh) * 2009-10-06 2015-01-21 Mstar Semiconductor Inc 可攜式控制裝置及其方法
US8634766B2 (en) 2010-02-16 2014-01-21 Andrew Llc Gain measurement and monitoring for wireless communication systems
CN103378853B (zh) * 2012-04-28 2016-04-13 上海华虹宏力半导体制造有限公司 锁相环电路
CN109450442A (zh) * 2018-11-14 2019-03-08 四川长虹电器股份有限公司 一种内置电流源的锁相环
JP7074100B2 (ja) * 2019-03-13 2022-05-24 株式会社Ｊｖｃケンウッド 無線通信装置およびプログラム
KR20210034991A (ko) 2019-09-23 2021-03-31 삼성전자주식회사 Rf 통신에 이용되는 pll 회로를 포함하는 전자 장치

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4115745A (en) * 1977-10-04 1978-09-19 Gte Sylvania Incorporated Phase lock speed-up circuit
GB2087564B (en) * 1980-11-14 1984-06-13 Redland Automation Ltd Object detector
US4458561A (en) * 1982-05-21 1984-07-10 Frank Andrew A Control system and method for a power delivery system having a continuously variable ratio transmission
EP0288007A3 (de) * 1987-04-20 1990-03-28 Anritsu Corporation Signalgenerierendes Gerät mit einer Phasenregelschleifen-Schaltung
US4890072A (en) * 1988-02-03 1989-12-26 Motorola, Inc. Phase locked loop having a fast lock current reduction and clamping circuit
US5220294A (en) * 1990-05-21 1993-06-15 Nec Corporation Phase-locked loop circuit
US5208546A (en) * 1991-08-21 1993-05-04 At&T Bell Laboratories Adaptive charge pump for phase-locked loops
DE4342344C2 (de) * 1993-12-11 1996-07-25 Telefunken Microelectron Schaltungsanordnung für eine Phasenregelschleife
GB9415185D0 (en) * 1994-07-28 1994-09-21 Thomson Consumer Electronics Fast acting control system
KR960038686A (ko) * 1995-04-13 1996-11-21 김광호 단일 주파수에 의한 신호 송수신회로
DE69619783T2 (de) * 1995-12-28 2002-10-02 Thomson Consumer Electronics, Inc. Phasenregelschleife mit regelbarer Antwortzeit
US5758274A (en) * 1996-03-13 1998-05-26 Symbol Technologies, Inc. Radio frequency receiver with automatic gain control
JP3839117B2 (ja) * 1997-01-30 2006-11-01 株式会社ルネサステクノロジ Ｐｌｌ回路およびそれを用いた無線通信端末機器
US6150890A (en) * 1998-03-19 2000-11-21 Conexant Systems, Inc. Dual band transmitter for a cellular phone comprising a PLL
FR2787259B1 (fr) * 1998-06-05 2004-07-09 Siemens Ag Boucle a verrouillage de phase pour des signaux a haute frequence
US6249685B1 (en) * 1998-12-21 2001-06-19 Texas Instruments Incorporated Low power fractional pulse generation in frequency tracking multi-band fractional-N phase lock loop
FR2798019B1 (fr) * 1999-08-26 2002-08-16 Cit Alcatel Synthetiseur de frequences a boucle de phase
GB2357381B (en) * 1999-12-13 2003-12-24 Sony Uk Ltd Changing the output frequency of a phased-locked loop
JP4401011B2 (ja) * 2000-08-04 2010-01-20 Ｎｅｃエレクトロニクス株式会社 Ｐｌｌ回路

Also Published As

Publication number Publication date
US20020084814A1 (en) 2002-07-04
KR20020055344A (ko) 2002-07-08
CN1361644A (zh) 2002-07-31
US20020086652A1 (en) 2002-07-04
EP1220453B1 (de) 2009-02-11
US6912380B2 (en) 2005-06-28
EP1220453A1 (de) 2002-07-03
ATE422729T1 (de) 2009-02-15
KR100746143B1 (ko) 2007-08-03
CN1232145C (zh) 2005-12-14
US6608510B2 (en) 2003-08-19
TW527778B (en) 2003-04-11
JP4057791B2 (ja) 2008-03-05
JP2002208856A (ja) 2002-07-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: RENESAS ELECTRONICS CORP., KAWASAKI-SHI, KANAG, JP

Owner name: TTPCOM LTD., ROYSTON, HERTFORDSHIRE, GB