DE60037963D1 - Turbo-Dekodierung mit Soft-Output Viterbi Dekoder - Google Patents

Turbo-Dekodierung mit Soft-Output Viterbi Dekoder

Info

Publication number
DE60037963D1
DE60037963D1 DE60037963T DE60037963T DE60037963D1 DE 60037963 D1 DE60037963 D1 DE 60037963D1 DE 60037963 T DE60037963 T DE 60037963T DE 60037963 T DE60037963 T DE 60037963T DE 60037963 D1 DE60037963 D1 DE 60037963D1
Authority
DE
Germany
Prior art keywords
llr
path
pes
cells
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60037963T
Other languages
English (en)
Other versions
DE60037963T2 (de
Inventor
Min-Goo Kim
Beong-Jo Kim
Young-Hwan Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE60037963D1 publication Critical patent/DE60037963D1/de
Application granted granted Critical
Publication of DE60037963T2 publication Critical patent/DE60037963T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/23Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0054Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4138Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors soft-output Viterbi algorithm based decoding, i.e. Viterbi decoding with weighted decisions
    • H03M13/4146Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors soft-output Viterbi algorithm based decoding, i.e. Viterbi decoding with weighted decisions soft-output Viterbi decoding according to Battail and Hagenauer in which the soft-output is determined using path metric differences along the maximum-likelihood path, i.e. "SOVA" decoding
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4161Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
    • H03M13/4184Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management using register-exchange
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6577Representation or format of variables, register sizes or word-lengths and quantization
    • H03M13/6583Normalization other than scaling, e.g. by subtraction
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0052Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957Turbo codes and decoding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Artificial Intelligence (AREA)
  • Error Detection And Correction (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
DE60037963T 1999-10-05 2000-10-05 Turbo-Dekodierung mit Soft-Output Viterbi Dekoder Expired - Lifetime DE60037963T2 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
KR9942924 1999-10-05
KR19990042924 1999-10-05
KR19990043118 1999-10-06
KR9943118 1999-10-06
PCT/KR2000/001109 WO2001026257A1 (en) 1999-10-05 2000-10-05 Component decoder and method thereof in mobile communication system

Publications (2)

Publication Number Publication Date
DE60037963D1 true DE60037963D1 (de) 2008-03-20
DE60037963T2 DE60037963T2 (de) 2009-01-29

Family

ID=26636175

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60037963T Expired - Lifetime DE60037963T2 (de) 1999-10-05 2000-10-05 Turbo-Dekodierung mit Soft-Output Viterbi Dekoder

Country Status (14)

Country Link
US (1) US6697443B1 (de)
EP (1) EP1135877B1 (de)
JP (1) JP3640924B2 (de)
KR (1) KR100350502B1 (de)
CN (1) CN1168237C (de)
AT (1) ATE385629T1 (de)
AU (1) AU762877B2 (de)
BR (1) BR0007197A (de)
CA (1) CA2352206C (de)
DE (1) DE60037963T2 (de)
DK (1) DK1135877T3 (de)
ES (1) ES2301492T3 (de)
IL (2) IL143337A0 (de)
WO (1) WO2001026257A1 (de)

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US6865710B2 (en) 2000-09-18 2005-03-08 Lucent Technologies Inc. Butterfly processor for telecommunications
EP1220455A1 (de) * 2000-12-29 2002-07-03 Motorola, Inc. Viterbi Dekodierer, entsprechendes Verfahren und Einheit
US20030067998A1 (en) * 2001-07-19 2003-04-10 Matsushita Electric Industrial Co., Ltd. Method for evaluating the quality of read signal and apparatus for reading information
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US7173985B1 (en) * 2002-08-05 2007-02-06 Altera Corporation Method and apparatus for implementing a Viterbi decoder
KR100515472B1 (ko) * 2002-10-15 2005-09-16 브이케이 주식회사 채널 부호화, 복호화 방법 및 이를 수행하는 다중 안테나무선통신 시스템
US7797618B2 (en) * 2004-12-30 2010-09-14 Freescale Semiconductor, Inc. Parallel decoder for ultrawide bandwidth receiver
JP4432781B2 (ja) * 2005-01-17 2010-03-17 株式会社日立製作所 誤り訂正復号器
US7571369B2 (en) * 2005-02-17 2009-08-04 Samsung Electronics Co., Ltd. Turbo decoder architecture for use in software-defined radio systems
US7603613B2 (en) * 2005-02-17 2009-10-13 Samsung Electronics Co., Ltd. Viterbi decoder architecture for use in software-defined radio systems
KR100800853B1 (ko) 2005-06-09 2008-02-04 삼성전자주식회사 통신 시스템에서 신호 수신 장치 및 방법
US20070006058A1 (en) * 2005-06-30 2007-01-04 Seagate Technology Llc Path metric computation unit for use in a data detector
US7764741B2 (en) * 2005-07-28 2010-07-27 Broadcom Corporation Modulation-type discrimination in a wireless communication network
US7860194B2 (en) * 2005-11-11 2010-12-28 Samsung Electronics Co., Ltd. Method and apparatus for normalizing input metric to a channel decoder in a wireless communication system
US20070268988A1 (en) * 2006-05-19 2007-11-22 Navini Networks, Inc. Method and system for optimal receive diversity combining
US7925964B2 (en) * 2006-12-22 2011-04-12 Intel Corporation High-throughput memory-efficient BI-SOVA decoder architecture
US7716564B2 (en) * 2007-09-04 2010-05-11 Broadcom Corporation Register exchange network for radix-4 SOVA (Soft-Output Viterbi Algorithm)
US8238475B2 (en) 2007-10-30 2012-08-07 Qualcomm Incorporated Methods and systems for PDCCH blind decoding in mobile communications
US20090132894A1 (en) * 2007-11-19 2009-05-21 Seagate Technology Llc Soft Output Bit Threshold Error Correction
US8127216B2 (en) 2007-11-19 2012-02-28 Seagate Technology Llc Reduced state soft output processing
US8401115B2 (en) * 2008-03-11 2013-03-19 Xilinx, Inc. Detector using limited symbol candidate generation for MIMO communication systems
US8413031B2 (en) * 2008-12-16 2013-04-02 Lsi Corporation Methods, apparatus, and systems for updating loglikelihood ratio information in an nT implementation of a Viterbi decoder
EP2442451A1 (de) * 2009-08-18 2012-04-18 TELEFONAKTIEBOLAGET LM ERICSSON (publ) Soft-Output-Viterbi-Algorithmusverfahren und Decoder
TWI394378B (zh) * 2010-05-17 2013-04-21 Novatek Microelectronics Corp 維特比解碼器及寫入與讀取方法
CN103701475B (zh) * 2013-12-24 2017-01-25 北京邮电大学 移动通信系统中8比特运算字长Turbo码的译码方法
TWI592937B (zh) * 2016-07-05 2017-07-21 大心電子(英屬維京群島)股份有限公司 解碼方法、記憶體儲存裝置及記憶體控制電路單元
CN108491346A (zh) * 2018-03-23 2018-09-04 江苏沁恒股份有限公司 一种bmc解码方法
KR20220051750A (ko) * 2020-10-19 2022-04-26 삼성전자주식회사 장치간 물리적 인터페이스의 트레이닝을 위한 장치 및 방법

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Also Published As

Publication number Publication date
AU7690900A (en) 2001-05-10
ATE385629T1 (de) 2008-02-15
EP1135877B1 (de) 2008-02-06
CN1327653A (zh) 2001-12-19
BR0007197A (pt) 2001-09-04
EP1135877A1 (de) 2001-09-26
DK1135877T3 (da) 2008-06-09
KR20010050871A (ko) 2001-06-25
IL143337A (en) 2008-08-07
ES2301492T3 (es) 2008-07-01
CA2352206C (en) 2005-12-06
CA2352206A1 (en) 2001-04-12
IL143337A0 (en) 2002-04-21
US6697443B1 (en) 2004-02-24
WO2001026257A1 (en) 2001-04-12
KR100350502B1 (ko) 2002-08-28
CN1168237C (zh) 2004-09-22
JP2003511895A (ja) 2003-03-25
JP3640924B2 (ja) 2005-04-20
EP1135877A4 (de) 2004-04-07
AU762877B2 (en) 2003-07-10
DE60037963T2 (de) 2009-01-29

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