DE60026905D1 - Chipträger - Google Patents
ChipträgerInfo
- Publication number
- DE60026905D1 DE60026905D1 DE60026905T DE60026905T DE60026905D1 DE 60026905 D1 DE60026905 D1 DE 60026905D1 DE 60026905 T DE60026905 T DE 60026905T DE 60026905 T DE60026905 T DE 60026905T DE 60026905 D1 DE60026905 D1 DE 60026905D1
- Authority
- DE
- Germany
- Prior art keywords
- chip carrier
- chip
- carrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/041—Solder preforms in the shape of solder balls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
Landscapes
- Microelectronics & Electronic Packaging (AREA)
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Geometry (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19125299 | 1999-07-06 | ||
JP11191252A JP2001024150A (ja) | 1999-07-06 | 1999-07-06 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60026905D1 true DE60026905D1 (de) | 2006-05-18 |
DE60026905T2 DE60026905T2 (de) | 2006-12-14 |
Family
ID=16271451
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60026905T Expired - Lifetime DE60026905T2 (de) | 1999-07-06 | 2000-07-04 | Chipträger |
Country Status (7)
Country | Link |
---|---|
US (1) | US6376917B1 (de) |
EP (1) | EP1067603B1 (de) |
JP (1) | JP2001024150A (de) |
KR (1) | KR100697758B1 (de) |
CA (1) | CA2313611C (de) |
DE (1) | DE60026905T2 (de) |
TW (1) | TW451454B (de) |
Families Citing this family (52)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2960560B2 (ja) | 1991-02-28 | 1999-10-06 | 株式会社日立製作所 | 超小型電子機器 |
JP2001068621A (ja) * | 1999-06-21 | 2001-03-16 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US7394153B2 (en) * | 1999-12-17 | 2008-07-01 | Osram Opto Semiconductors Gmbh | Encapsulation of electronic devices |
CN1264057C (zh) | 1999-12-17 | 2006-07-12 | 奥斯兰姆奥普托半导体有限责任公司 | 有机发光二极管器件封装装置及方法 |
EP1240808B1 (de) | 1999-12-17 | 2003-05-21 | Osram Opto Semiconductors GmbH | Kapselung für organische leds |
US6437990B1 (en) * | 2000-03-20 | 2002-08-20 | Agere Systems Guardian Corp. | Multi-chip ball grid array IC packages |
TW569403B (en) * | 2001-04-12 | 2004-01-01 | Siliconware Precision Industries Co Ltd | Multi-chip module and its manufacturing method |
JP3420748B2 (ja) * | 2000-12-14 | 2003-06-30 | 松下電器産業株式会社 | 半導体装置及びその製造方法 |
US20020121707A1 (en) * | 2001-02-27 | 2002-09-05 | Chippac, Inc. | Super-thin high speed flip chip package |
US8143108B2 (en) * | 2004-10-07 | 2012-03-27 | Stats Chippac, Ltd. | Semiconductor device and method of dissipating heat from thin package-on-package mounted to substrate |
US20040070080A1 (en) * | 2001-02-27 | 2004-04-15 | Chippac, Inc | Low cost, high performance flip chip package structure |
USRE44438E1 (en) | 2001-02-27 | 2013-08-13 | Stats Chippac, Ltd. | Semiconductor device and method of dissipating heat from thin package-on-package mounted to substrate |
US6882546B2 (en) * | 2001-10-03 | 2005-04-19 | Formfactor, Inc. | Multiple die interconnect system |
TW523889B (en) * | 2002-01-09 | 2003-03-11 | Advanced Semiconductor Eng | Semiconductor packaged device |
KR100481706B1 (ko) * | 2002-03-25 | 2005-04-11 | 주식회사 넥사이언 | 플립칩의 제조방법 |
US6911726B2 (en) * | 2002-06-07 | 2005-06-28 | Intel Corporation | Microelectronic packaging and methods for thermally protecting package interconnects and components |
TW546796B (en) * | 2002-06-10 | 2003-08-11 | Advanced Semiconductor Eng | Multichip package |
US7294928B2 (en) | 2002-09-06 | 2007-11-13 | Tessera, Inc. | Components, methods and assemblies for stacked packages |
US6765152B2 (en) * | 2002-09-27 | 2004-07-20 | International Business Machines Corporation | Multichip module having chips on two sides |
TW569416B (en) * | 2002-12-19 | 2004-01-01 | Via Tech Inc | High density multi-chip module structure and manufacturing method thereof |
US20040262727A1 (en) * | 2003-06-30 | 2004-12-30 | Mcconville David P. | Computer system implemented on flex tape |
JP4587676B2 (ja) * | 2004-01-29 | 2010-11-24 | ルネサスエレクトロニクス株式会社 | チップ積層構成の3次元半導体装置 |
JP2006303003A (ja) * | 2005-04-18 | 2006-11-02 | Toshiba Corp | プリント基板、および情報処理装置 |
JP4507101B2 (ja) * | 2005-06-30 | 2010-07-21 | エルピーダメモリ株式会社 | 半導体記憶装置及びその製造方法 |
JP4498991B2 (ja) * | 2005-07-15 | 2010-07-07 | 新光電気工業株式会社 | 半導体装置及び電子装置 |
TWI264127B (en) * | 2005-09-23 | 2006-10-11 | Via Tech Inc | Chip package and substrate thereof |
WO2007049375A1 (ja) * | 2005-10-27 | 2007-05-03 | Murata Manufacturing Co., Ltd. | 複合回路モジュール及び高周波モジュール装置 |
JP4844118B2 (ja) * | 2005-12-22 | 2011-12-28 | パナソニック電工株式会社 | センサモジュールおよびその製造方法 |
JP2008091638A (ja) | 2006-10-02 | 2008-04-17 | Nec Electronics Corp | 電子装置およびその製造方法 |
US8237289B2 (en) | 2007-01-30 | 2012-08-07 | Kabushiki Kaisha Toshiba | System in package device |
JP2008294423A (ja) | 2007-04-24 | 2008-12-04 | Nec Electronics Corp | 半導体装置 |
CN101471330B (zh) * | 2007-12-28 | 2010-06-09 | 鸿富锦精密工业(深圳)有限公司 | 半导体封装结构 |
KR101193416B1 (ko) * | 2008-05-09 | 2012-10-24 | 고쿠리츠 다이가쿠 호진 큐슈 코교 다이가쿠 | 3차원 실장 반도체 장치 및 그의 제조 방법 |
US8399983B1 (en) * | 2008-12-11 | 2013-03-19 | Xilinx, Inc. | Semiconductor assembly with integrated circuit and companion device |
JP4801133B2 (ja) * | 2008-12-15 | 2011-10-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US8987896B2 (en) * | 2009-12-16 | 2015-03-24 | Intel Corporation | High-density inter-package connections for ultra-thin package-on-package structures, and processes of forming same |
JP5091221B2 (ja) * | 2009-12-28 | 2012-12-05 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US20130277855A1 (en) * | 2012-04-24 | 2013-10-24 | Terry (Teckgyu) Kang | High density 3d package |
JP6005438B2 (ja) * | 2012-08-10 | 2016-10-12 | 株式会社ThruChip Japan | 積層集積回路 |
KR101950976B1 (ko) * | 2012-10-25 | 2019-02-25 | 에스케이하이닉스 주식회사 | 반도체 패키지 |
US20140159758A1 (en) * | 2012-12-12 | 2014-06-12 | Qualcomm Incorporated | Assembly for optical backside failure analysis of package-on-package (pop) during electrical testing |
US9070657B2 (en) * | 2013-10-08 | 2015-06-30 | Freescale Semiconductor, Inc. | Heat conductive substrate for integrated circuit package |
EP2881983B1 (de) | 2013-12-05 | 2019-09-18 | ams AG | Interposer-Chip-Anordnung für dichte Chippackungen |
EP2881753B1 (de) | 2013-12-05 | 2019-03-06 | ams AG | Optische Sensoranordnung und Verfahren zur Herstellung einer optischen Sensoranordnung |
US10121768B2 (en) | 2015-05-27 | 2018-11-06 | Bridge Semiconductor Corporation | Thermally enhanced face-to-face semiconductor assembly with built-in heat spreader and method of making the same |
US10354984B2 (en) | 2015-05-27 | 2019-07-16 | Bridge Semiconductor Corporation | Semiconductor assembly with electromagnetic shielding and thermally enhanced characteristics and method of making the same |
US11291146B2 (en) | 2014-03-07 | 2022-03-29 | Bridge Semiconductor Corp. | Leadframe substrate having modulator and crack inhibiting structure and flip chip assembly using the same |
JP6019367B2 (ja) * | 2015-01-13 | 2016-11-02 | 株式会社野田スクリーン | 半導体装置 |
US20190006339A1 (en) * | 2017-06-28 | 2019-01-03 | Asm Technology Singapore Pte Ltd | Three-dimensional integrated fan-out wafer level package |
JP2018137474A (ja) * | 2018-04-16 | 2018-08-30 | ルネサスエレクトロニクス株式会社 | 電子装置 |
WO2020101572A1 (en) * | 2018-11-12 | 2020-05-22 | Agency For Science, Technology And Research | Multi-chip system and method of forming the same |
CN112543559A (zh) * | 2020-12-08 | 2021-03-23 | 福建飞毛腿动力科技有限公司 | 一种基于铝基板贴片的扩流导流焊板及其均流方法 |
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US4778950A (en) * | 1985-07-22 | 1988-10-18 | Digital Equipment Corporation | Anisotropic elastomeric interconnecting system |
JPH0738502B2 (ja) * | 1989-10-17 | 1995-04-26 | シャープ株式会社 | 回路基板の接続方法 |
EP0486829B1 (de) * | 1990-10-22 | 1997-04-23 | Seiko Epson Corporation | Halbleiteranordnung und Verpackungssystem für Halbleiteranordnung |
US5252857A (en) * | 1991-08-05 | 1993-10-12 | International Business Machines Corporation | Stacked DCA memory chips |
US5396403A (en) * | 1993-07-06 | 1995-03-07 | Hewlett-Packard Company | Heat sink assembly with thermally-conductive plate for a plurality of integrated circuits on a substrate |
US5477082A (en) * | 1994-01-11 | 1995-12-19 | Exponential Technology, Inc. | Bi-planar multi-chip module |
US5892275A (en) * | 1995-08-29 | 1999-04-06 | Intel Corporation | High performance power and ground edge connect IC package |
US5801072A (en) * | 1996-03-14 | 1998-09-01 | Lsi Logic Corporation | Method of packaging integrated circuits |
US5805424A (en) * | 1996-09-24 | 1998-09-08 | Texas Instruments Incorporated | Microelectronic assemblies including Z-axis conductive films |
KR100467946B1 (ko) * | 1997-01-24 | 2005-01-24 | 로무 가부시키가이샤 | 반도체 칩의 제조방법 |
US5838072A (en) * | 1997-02-24 | 1998-11-17 | Mosel Vitalic Corporation | Intrachip power distribution package and method for semiconductors having a supply node electrically interconnected with one or more intermediate nodes |
US6075287A (en) * | 1997-04-03 | 2000-06-13 | International Business Machines Corporation | Integrated, multi-chip, thermally conductive packaging device and methodology |
US6150724A (en) * | 1998-03-02 | 2000-11-21 | Motorola, Inc. | Multi-chip semiconductor device and method for making the device by using multiple flip chip interfaces |
US5977640A (en) * | 1998-06-26 | 1999-11-02 | International Business Machines Corporation | Highly integrated chip-on-chip packaging |
KR100527044B1 (ko) * | 2003-10-28 | 2005-11-09 | 주식회사 한국종합기술개발공사 | 감전 사고 예방용 전주 덮개 |
-
1999
- 1999-07-06 JP JP11191252A patent/JP2001024150A/ja active Pending
-
2000
- 2000-07-04 TW TW089113178A patent/TW451454B/zh not_active IP Right Cessation
- 2000-07-04 DE DE60026905T patent/DE60026905T2/de not_active Expired - Lifetime
- 2000-07-04 EP EP00114291A patent/EP1067603B1/de not_active Expired - Lifetime
- 2000-07-05 CA CA2313611A patent/CA2313611C/en not_active Expired - Lifetime
- 2000-07-06 KR KR1020000038519A patent/KR100697758B1/ko active IP Right Grant
- 2000-07-06 US US09/611,205 patent/US6376917B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1067603B1 (de) | 2006-03-29 |
DE60026905T2 (de) | 2006-12-14 |
KR20010066905A (ko) | 2001-07-11 |
JP2001024150A (ja) | 2001-01-26 |
EP1067603A3 (de) | 2003-08-20 |
CA2313611A1 (en) | 2001-01-06 |
EP1067603A2 (de) | 2001-01-10 |
TW451454B (en) | 2001-08-21 |
CA2313611C (en) | 2010-05-18 |
KR100697758B1 (ko) | 2007-03-21 |
US6376917B1 (en) | 2002-04-23 |
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