DE4103834C2 - - Google Patents

Info

Publication number
DE4103834C2
DE4103834C2 DE19914103834 DE4103834A DE4103834C2 DE 4103834 C2 DE4103834 C2 DE 4103834C2 DE 19914103834 DE19914103834 DE 19914103834 DE 4103834 A DE4103834 A DE 4103834A DE 4103834 C2 DE4103834 C2 DE 4103834C2
Authority
DE
Germany
Prior art keywords
layer
copper
structuring
etching
laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19914103834
Other languages
German (de)
English (en)
Other versions
DE4103834A1 (de
Inventor
Joerg 3057 Neustadt De Kickelhain
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lpkf Cad/cam Systeme 3000 Hannover De GmbH
Original Assignee
Lpkf Cad/cam Systeme 3000 Hannover De GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lpkf Cad/cam Systeme 3000 Hannover De GmbH filed Critical Lpkf Cad/cam Systeme 3000 Hannover De GmbH
Priority to DE19914103834 priority Critical patent/DE4103834A1/de
Priority to JP4051915A priority patent/JPH05291730A/ja
Publication of DE4103834A1 publication Critical patent/DE4103834A1/de
Application granted granted Critical
Publication of DE4103834C2 publication Critical patent/DE4103834C2/de
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0369Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107Using laser light
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
DE19914103834 1991-02-08 1991-02-08 Verfahren zur herstellung von leiterplatten Granted DE4103834A1 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE19914103834 DE4103834A1 (de) 1991-02-08 1991-02-08 Verfahren zur herstellung von leiterplatten
JP4051915A JPH05291730A (ja) 1991-02-08 1992-03-10 プリント回路板製造法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19914103834 DE4103834A1 (de) 1991-02-08 1991-02-08 Verfahren zur herstellung von leiterplatten

Publications (2)

Publication Number Publication Date
DE4103834A1 DE4103834A1 (de) 1992-08-13
DE4103834C2 true DE4103834C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-11-12

Family

ID=6424646

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19914103834 Granted DE4103834A1 (de) 1991-02-08 1991-02-08 Verfahren zur herstellung von leiterplatten

Country Status (2)

Country Link
JP (1) JPH05291730A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE4103834A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5580466A (en) * 1993-04-14 1996-12-03 Hitachi Construction Machinery Co., Ltd. Metal plate processing method, lead frame processing method, lead frame, semiconductor device manufacturing method, and semiconductor device
DE4417245A1 (de) * 1994-04-23 1995-10-26 Lpkf Cad Cam Systeme Gmbh Verfahren zur strukturierten Metallisierung der Oberfläche von Substraten
EP0727925A1 (de) * 1995-02-14 1996-08-21 Lpkf Cad/Cam Systeme Gmbh Verfahren zur strukturierten Metallisierung der Oberfläche von Substraten
WO1998015159A1 (de) * 1996-09-30 1998-04-09 Siemens S.A. Verfahren zur bildung von mindestens zwei verdrahtungsebenen auf elektrisch isolierenden unterlagen
DE19913367C1 (de) * 1999-03-24 2000-12-14 Siemens Ag Verfahren zur Herstellung einer elektrischen Schaltung
JP4759172B2 (ja) * 2001-07-05 2011-08-31 リコーマイクロエレクトロニクス株式会社 基板製造方法
US6822332B2 (en) 2002-09-23 2004-11-23 International Business Machines Corporation Fine line circuitization
DE102006010942B4 (de) * 2006-03-09 2017-02-09 Leonhard Kurz Gmbh & Co. Kg Verfahren zur Herstellung mindestens einer elektrisch leitenden Struktur sowie elektrisch leitende Struktur
JP2008016507A (ja) * 2006-07-03 2008-01-24 Toshiba Tec Corp 電気配線の製造方法
WO2012148332A1 (en) * 2011-04-29 2012-11-01 Telefonaktiebolaget L M Ericsson (Publ) Manufacturing method for printed circuit boards
CN102974937B (zh) * 2012-11-12 2015-04-15 中国科学院半导体研究所 基于超声定位的激光加工装置及加工方法
CN103203541B (zh) * 2013-02-04 2015-05-13 张立国 一种激光加工装置
CN103353709A (zh) * 2013-08-01 2013-10-16 北京弘浩千瑞科技有限公司 一种用于印刷线路板生产的掩膜光刻机
DE102016103047A1 (de) * 2016-02-22 2017-08-24 Itz Innovations- Und Technologiezentrum Gmbh Herstellungsverfahren für eine Leuchtenkomponente und mit dem Verfahren hergestellte Leuchtenkomponente
JP2020136638A (ja) * 2019-02-26 2020-08-31 三菱マテリアル株式会社 絶縁回路基板の製造方法
CN115348741A (zh) * 2022-08-31 2022-11-15 陈旭东 减成法细线路电路板制造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3113855A1 (de) * 1981-04-06 1982-10-21 Fritz Wittig Herstellung gedruckter Schaltungen, 8000 München Verfahren zur herstellung von leiterplatten
NO894656L (no) * 1989-02-07 1990-08-08 Autodisplay As Fremgangsmaate for fremstilling av et elektrodemoenster paa et substrat.
US4909895A (en) * 1989-04-11 1990-03-20 Pacific Bell System and method for providing a conductive circuit pattern utilizing thermal oxidation

Also Published As

Publication number Publication date
DE4103834A1 (de) 1992-08-13
JPH05291730A (ja) 1993-11-05

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee