DE3888549T2 - Digitaler Signalverteiler. - Google Patents

Digitaler Signalverteiler.

Info

Publication number
DE3888549T2
DE3888549T2 DE3888549T DE3888549T DE3888549T2 DE 3888549 T2 DE3888549 T2 DE 3888549T2 DE 3888549 T DE3888549 T DE 3888549T DE 3888549 T DE3888549 T DE 3888549T DE 3888549 T2 DE3888549 T2 DE 3888549T2
Authority
DE
Germany
Prior art keywords
digital signal
signal distributor
distributor
digital
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3888549T
Other languages
English (en)
Other versions
DE3888549D1 (de
Inventor
Brian Jeremy Parsons
Roger Mark Shepherd
Michael David May
Graham Stewart
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Ltd Great Britain
Original Assignee
Inmos Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inmos Ltd filed Critical Inmos Ltd
Application granted granted Critical
Publication of DE3888549D1 publication Critical patent/DE3888549D1/de
Publication of DE3888549T2 publication Critical patent/DE3888549T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356—Indirect interconnection networks
    • G06F15/17368—Indirect interconnection networks non hierarchical topologies
    • G06F15/17375—One dimensional, e.g. linear array, ring
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5672—Multiplexing, e.g. coding, scrambling
    • H04L2012/5674—Synchronisation, timing recovery or alignment
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H04L49/254—Centralised controller, i.e. arbitration or scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3027—Output queuing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
DE3888549T 1987-01-19 1988-01-13 Digitaler Signalverteiler. Expired - Fee Related DE3888549T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB878701009A GB8701009D0 (en) 1987-01-19 1987-01-19 Digital signal switch

Publications (2)

Publication Number Publication Date
DE3888549D1 DE3888549D1 (de) 1994-04-28
DE3888549T2 true DE3888549T2 (de) 1994-08-11

Family

ID=10610827

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3888549T Expired - Fee Related DE3888549T2 (de) 1987-01-19 1988-01-13 Digitaler Signalverteiler.

Country Status (5)

Country Link
US (1) US4885740A (de)
EP (1) EP0276076B1 (de)
JP (1) JP3150677B2 (de)
DE (1) DE3888549T2 (de)
GB (1) GB8701009D0 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2011935A1 (en) * 1989-04-07 1990-10-07 Desiree A. Awiszio Dual-path computer interconnect system with four-ported packet memory control
US4982187A (en) * 1989-11-28 1991-01-01 International Business Machines Corporation Low-end high-performance switch subsystem architecture
ATE130447T1 (de) * 1990-09-27 1995-12-15 Siemens Nixdorf Inf Syst Multiprozessorsystem mit gemeinsamem speicher.
EP0477405B1 (de) * 1990-09-27 1996-11-27 Siemens Nixdorf Informationssysteme Aktiengesellschaft Kommunikationssystem zum Übertragen von Nachrichten zwischen jeweils zwei Einheiten
JPH0799831B2 (ja) * 1990-10-08 1995-10-25 株式会社東芝 Ａｔｍ通信システム用単位セルスイッチ
JP2770936B2 (ja) * 1990-12-18 1998-07-02 インターナショナル・ビジネス・マシーンズ・コーポレイション 通信ネットワークおよび通信チャンネルをつくる方法
US5168492A (en) * 1991-04-11 1992-12-01 Northern Telecom Limited Rotating-access ATM-STM packet switch
US5410300A (en) * 1991-09-06 1995-04-25 International Business Machines Corporation Distributed crossbar switch architecture
US5619550A (en) * 1993-09-23 1997-04-08 Motorola, Inc. Testing within communication systems using an arq protocol
US5621893A (en) * 1994-11-22 1997-04-15 Lucent Technologies Inc. System for expanding ports wherein segment switch selectively associates plurality of hubs coupled to first arbiter and plurality of hubs coupled to second arbiter
US6400644B1 (en) 1999-07-21 2002-06-04 Matsushita Electric Industrial Co., Ltd. Semiconductor control unit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51100603A (en) * 1975-03-03 1976-09-06 Hitachi Ltd Paketsutokokanmoni okeru deetasojushinhoshiki
US4312065A (en) * 1978-06-02 1982-01-19 Texas Instruments Incorporated Transparent intelligent network for data and voice
US4417245A (en) * 1981-09-02 1983-11-22 International Business Machines Corp. Digital space division exchange
US4527267A (en) * 1982-07-09 1985-07-02 At&T Bell Laboratories Method of administering local and end-to-end acknowledgments in a packet communication system
GB8329510D0 (en) * 1983-11-04 1983-12-07 Inmos Ltd Computer apparatus

Also Published As

Publication number Publication date
JP3150677B2 (ja) 2001-03-26
EP0276076A2 (de) 1988-07-27
DE3888549D1 (de) 1994-04-28
GB8701009D0 (en) 1987-02-18
EP0276076B1 (de) 1994-03-23
US4885740A (en) 1989-12-05
JPS63193741A (ja) 1988-08-11
EP0276076A3 (en) 1990-03-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: SGS-THOMSON MICROELECTRONICS LTD., MARLOW, BUCKING

8339 Ceased/non-payment of the annual fee