DE3887016D1 - Bussender mit gesteuerter, trapezförmiger Ausgangsspannung. - Google Patents

Bussender mit gesteuerter, trapezförmiger Ausgangsspannung.

Info

Publication number
DE3887016D1
DE3887016D1 DE88400859T DE3887016T DE3887016D1 DE 3887016 D1 DE3887016 D1 DE 3887016D1 DE 88400859 T DE88400859 T DE 88400859T DE 3887016 T DE3887016 T DE 3887016T DE 3887016 D1 DE3887016 D1 DE 3887016D1
Authority
DE
Germany
Prior art keywords
controlled
output voltage
bus transmitter
trapezoidal output
trapezoidal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE88400859T
Other languages
English (en)
Inventor
David S Grondalski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Application granted granted Critical
Publication of DE3887016D1 publication Critical patent/DE3887016D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K4/00—Generating pulses having essentially a finite slope or stepped portions
    • H03K4/94—Generating pulses having essentially a finite slope or stepped portions having trapezoidal shape
DE88400859T 1987-06-29 1988-04-08 Bussender mit gesteuerter, trapezförmiger Ausgangsspannung. Expired - Lifetime DE3887016D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US6794587A 1987-06-29 1987-06-29
IN290DE1988 IN172403B (de) 1987-06-29 1988-04-08

Publications (1)

Publication Number Publication Date
DE3887016D1 true DE3887016D1 (de) 1994-02-24

Family

ID=26324575

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88400859T Expired - Lifetime DE3887016D1 (de) 1987-06-29 1988-04-08 Bussender mit gesteuerter, trapezförmiger Ausgangsspannung.

Country Status (6)

Country Link
EP (1) EP0297932B1 (de)
JP (1) JPS6439814A (de)
AU (1) AU608822B2 (de)
CA (1) CA1292521C (de)
DE (1) DE3887016D1 (de)
IN (1) IN172403B (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4906867A (en) * 1988-11-09 1990-03-06 Ncr Corporation Buffer circuit with load sensitive transition control
EP0379881B1 (de) * 1989-01-24 1994-07-27 Integrated Device Technology, Inc. CMOS-Ausgangstreiber
DE4131783C1 (de) * 1991-09-24 1993-02-04 Siemens Ag, 8000 Muenchen, De
DE4400872A1 (de) * 1994-01-14 1995-07-20 Philips Patentverwaltung Ausgangstreiberschaltung
US5677642A (en) * 1994-11-01 1997-10-14 At&T Global Information Solutions Company Signal generator with supply voltage tolerance
EP0926826A1 (de) * 1997-12-18 1999-06-30 ABB Research Ltd. Verfahren und Vorrichtung für Leistungstransistor
DE19822259C2 (de) 1998-05-18 2000-07-06 Siemens Ag Sendeeinrichtung und Bussystem zur Datenübertragung
WO2002033501A1 (de) * 2000-10-17 2002-04-25 Siemens Aktiengesellschaft Stromversorgungsschaltung

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5726010B2 (de) * 1972-03-28 1982-06-02
US4064379A (en) * 1976-06-11 1977-12-20 Communications Satellite Corporation Logarithmic echo canceller
US4491748A (en) * 1981-04-16 1985-01-01 International Business Machines Corporation High performance FET driver circuit
JPS5869113A (ja) * 1981-10-20 1983-04-25 Toshiba Corp 半導体集積回路
US4504779A (en) * 1983-03-11 1985-03-12 Hewlett-Packard Company Electrical load drive and control system
US4614882A (en) * 1983-11-22 1986-09-30 Digital Equipment Corporation Bus transceiver including compensation circuit for variations in electrical characteristics of components
US4593206A (en) * 1984-01-16 1986-06-03 Motorola, Inc. Fixed slew rate bus driver circuit
GB2160044A (en) * 1984-05-31 1985-12-11 Stc Plc Generation of trapezoidal waveforms
US4567378A (en) * 1984-06-13 1986-01-28 International Business Machines Corporation Driver circuit for controlling signal rise and fall in field effect transistor processors
KR920006438B1 (ko) * 1985-04-22 1992-08-06 엘 에스 아이 로직 코포레이션 슬루 레이트(slew rate)가 제어되는 고속 CMOS 버퍼

Also Published As

Publication number Publication date
JPS6439814A (en) 1989-02-10
AU608822B2 (en) 1991-04-18
EP0297932A2 (de) 1989-01-04
EP0297932A3 (en) 1989-12-27
AU1434688A (en) 1989-01-05
EP0297932B1 (de) 1994-01-12
IN172403B (de) 1993-07-17
CA1292521C (en) 1991-11-26

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Legal Events

Date Code Title Description
8332 No legal effect for de