DE3884674D1 - Transistoren auf einem Sockel und deren Herstellungsverfahren. - Google Patents

Transistoren auf einem Sockel und deren Herstellungsverfahren.

Info

Publication number
DE3884674D1
DE3884674D1 DE88106384T DE3884674T DE3884674D1 DE 3884674 D1 DE3884674 D1 DE 3884674D1 DE 88106384 T DE88106384 T DE 88106384T DE 3884674 T DE3884674 T DE 3884674T DE 3884674 D1 DE3884674 D1 DE 3884674D1
Authority
DE
Germany
Prior art keywords
transistors
base
manufacturing processes
processes
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE88106384T
Other languages
English (en)
Inventor
Israel Arnold Lesk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of DE3884674D1 publication Critical patent/DE3884674D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248—Combination of bipolar and field-effect technology
    • H01L21/8249—Bipolar and MOS technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66606—Lateral single gate silicon transistors with final source and drain contacts formation strictly before final or dummy gate formation, e.g. contact first technology

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE88106384T 1987-05-11 1988-04-21 Transistoren auf einem Sockel und deren Herstellungsverfahren. Expired - Lifetime DE3884674D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/048,345 US4728391A (en) 1987-05-11 1987-05-11 Pedestal transistors and method of production thereof

Publications (1)

Publication Number Publication Date
DE3884674D1 true DE3884674D1 (de) 1993-11-11

Family

ID=21954077

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88106384T Expired - Lifetime DE3884674D1 (de) 1987-05-11 1988-04-21 Transistoren auf einem Sockel und deren Herstellungsverfahren.

Country Status (4)

Country Link
US (1) US4728391A (de)
EP (1) EP0293588B1 (de)
JP (1) JPS63292680A (de)
DE (1) DE3884674D1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990013916A1 (en) * 1989-05-10 1990-11-15 Oki Electric Industry Co., Ltd. Method of fabricating semiconductor devices
JPH0758701B2 (ja) * 1989-06-08 1995-06-21 株式会社東芝 半導体装置の製造方法
US5183781A (en) * 1990-01-12 1993-02-02 Nec Corporation Method of manufacturing semiconductor device
DE4121051A1 (de) * 1991-06-26 1993-01-07 Eurosil Electronic Gmbh Halbleiteranordnung und verfahren zur herstellung
DE69424717T2 (de) * 1993-03-17 2001-05-31 Canon K.K., Tokio/Tokyo Verbindungsverfahren einer Verdrahtung mit einem Halbleitergebiet und durch dieses Verfahren hergestellte Halbleitervorrichtung

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS576117A (en) * 1980-06-11 1982-01-13 Toyota Motor Corp Crankshaft of internal combustion engine
IE52791B1 (en) * 1980-11-05 1988-03-02 Fujitsu Ltd Semiconductor devices
JPS59139643A (ja) * 1983-01-31 1984-08-10 Hitachi Ltd 半導体装置およびその製造方法
DE3304588A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von mos-transistoren mit flachen source/drain-gebieten, kurzen kanallaengen und einer selbstjustierten, aus einem metallsilizid bestehenden kontaktierungsebene
US4546535A (en) * 1983-12-12 1985-10-15 International Business Machines Corporation Method of making submicron FET structure
JPS60223165A (ja) * 1984-04-19 1985-11-07 Toshiba Corp 半導体装置の製造方法
DE3580206D1 (de) * 1984-07-31 1990-11-29 Toshiba Kawasaki Kk Bipolarer transistor und verfahren zu seiner herstellung.
FR2577715B1 (fr) * 1985-02-19 1987-03-20 Thomson Csf Procede de realisation de deux structures mos a dielectriques juxtaposes differents et dopages differents et matrice a transfert de trame obtenue par ce procede
NL8500771A (nl) * 1985-03-18 1986-10-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een op een laag siliciumoxide aanwezige dubbellaag - bestaande uit poly-si en een silicide - in een plasma wordt geetst.
US4929992A (en) * 1985-09-18 1990-05-29 Advanced Micro Devices, Inc. MOS transistor construction with self aligned silicided contacts to gate, source, and drain regions
US4675984A (en) * 1985-09-19 1987-06-30 Rca Corporation Method of exposing only the top surface of a mesa
JPS62165014A (ja) * 1986-01-14 1987-07-21 Sanshin Ind Co Ltd ２サイクルエンジンのクランク軸
JPS62165015A (ja) * 1986-01-14 1987-07-21 Sanshin Ind Co Ltd 船外機用エンジンのクランク軸

Also Published As

Publication number Publication date
EP0293588A2 (de) 1988-12-07
US4728391A (en) 1988-03-01
EP0293588A3 (en) 1989-04-05
EP0293588B1 (de) 1993-10-06
JPS63292680A (ja) 1988-11-29

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Legal Events

Date Code Title Description
8332 No legal effect for de