DE3884221T2 - Speichersteuereinheit als videosignalprozessor. - Google Patents

Speichersteuereinheit als videosignalprozessor.

Info

Publication number
DE3884221T2
DE3884221T2 DE88909878T DE3884221T DE3884221T2 DE 3884221 T2 DE3884221 T2 DE 3884221T2 DE 88909878 T DE88909878 T DE 88909878T DE 3884221 T DE3884221 T DE 3884221T DE 3884221 T2 DE3884221 T2 DE 3884221T2
Authority
DE
Germany
Prior art keywords
control unit
video signal
signal processor
memory control
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE88909878T
Other languages
English (en)
Other versions
DE3884221D1 (de
Inventor
David Sprague
Allen Simon
Alfred Kwan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE3884221D1 publication Critical patent/DE3884221D1/de
Publication of DE3884221T2 publication Critical patent/DE3884221T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/907—Television signal recording using static stores, e.g. storage tubes or semiconductor memories
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/24—Systems for the transmission of television signals using pulse code modulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Image Processing (AREA)
DE88909878T 1987-11-16 1988-11-03 Speichersteuereinheit als videosignalprozessor. Expired - Fee Related DE3884221T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/121,025 US5088053A (en) 1987-11-16 1987-11-16 Memory controller as for a video signal processor

Publications (2)

Publication Number Publication Date
DE3884221D1 DE3884221D1 (de) 1993-10-21
DE3884221T2 true DE3884221T2 (de) 1994-01-13

Family

ID=22394018

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88909878T Expired - Fee Related DE3884221T2 (de) 1987-11-16 1988-11-03 Speichersteuereinheit als videosignalprozessor.

Country Status (7)

Country Link
US (1) US5088053A (de)
EP (1) EP0398881B1 (de)
JP (1) JPH0752467B2 (de)
KR (1) KR960006501B1 (de)
CA (1) CA1319421C (de)
DE (1) DE3884221T2 (de)
WO (1) WO1989005012A1 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2026527A1 (en) * 1989-10-11 1991-04-12 Douglas A. Fischer Parallel polygon/pixel rendering engine
US5247612A (en) * 1990-06-29 1993-09-21 Radius Inc. Pixel display apparatus and method using a first-in, first-out buffer
CA2065979C (en) * 1991-06-10 1999-01-19 Stephen Patrick Thompson Mode dependent minimum fifo fill level controls processor access to video memory
US5261047A (en) * 1991-10-29 1993-11-09 Xerox Corporation Bus arbitration scheme for facilitating operation of a printing apparatus
DE69322532T2 (de) * 1992-02-26 1999-04-29 Cirrus Logic Inc Digitale Verarbeitungseinheit für Videoschnitt
US5450544A (en) * 1992-06-19 1995-09-12 Intel Corporation Method and apparatus for data buffering and queue management of digital motion video signals
US5799205A (en) * 1992-11-13 1998-08-25 Mannesmann Aktiengesellschaft Transfer system for data exchange using two active central processing units directly connected together parallel to serial system bus directly connecting CPUs to dispersed devices
US5614952A (en) * 1994-10-11 1997-03-25 Hitachi America, Ltd. Digital video decoder for decoding digital high definition and/or digital standard definition television signals
JP2790007B2 (ja) * 1993-07-29 1998-08-27 日本電気株式会社 画像メモリアクセス制御方式
US5832304A (en) * 1995-03-15 1998-11-03 Unisys Corporation Memory queue with adjustable priority and conflict detection
US5701434A (en) * 1995-03-16 1997-12-23 Hitachi, Ltd. Interleave memory controller with a common access queue
US5933855A (en) * 1997-03-21 1999-08-03 Rubinstein; Richard Shared, reconfigurable memory architectures for digital signal processing
US5956047A (en) * 1997-04-30 1999-09-21 Hewlett-Packard Co. ROM-based control units in a geometry accelerator for a computer graphics system
US6184902B1 (en) * 1997-04-30 2001-02-06 Hewlett-Packard Company Centralized branch intelligence system and method for a geometry accelerator
US5930519A (en) * 1997-04-30 1999-07-27 Hewlett Packard Company Distributed branch logic system and method for a geometry accelerator
GB2329985A (en) * 1997-10-02 1999-04-07 Motorola Ltd Shared memory control method
GB9724028D0 (en) * 1997-11-13 1998-01-14 Advanced Telecommunications Mo Shared memory access controller
FR2778258A1 (fr) * 1998-04-29 1999-11-05 Texas Instruments France Controleur d'acces de trafic dans une memoire, systeme de calcul comprenant ce controleur d'acces et procede de fonctionnement d'un tel controleur d'acces
US6205181B1 (en) 1998-03-10 2001-03-20 Chips & Technologies, Llc Interleaved strip data storage system for video processing
US6798420B1 (en) * 1998-11-09 2004-09-28 Broadcom Corporation Video and graphics system with a single-port RAM
US6404935B1 (en) * 1999-06-02 2002-06-11 Sun Microsystems, Inc. Area efficient two-stage correction log look-up
EP1059587B1 (de) * 1999-06-09 2007-04-18 Texas Instruments Incorporated Host-Zugriff zu gemeinschaftlichem Speicher mit Hochprioritätsbetriebsart
EP1431206A4 (de) * 2001-09-27 2010-06-02 Tetra Laval Holdings & Finance Papierverpackungsmaterial für flüssige lebensmittel und verfahren zu dessen herstellung
JP2003122309A (ja) * 2001-10-03 2003-04-25 Koninkl Philips Electronics Nv 表示装置
US20070005409A1 (en) * 2005-06-30 2007-01-04 International Business Machines Corporation Method and structure for overriding calendar entries based on context and business value
US20070005408A1 (en) * 2005-06-30 2007-01-04 International Business Machines Corporation Method and structure for agenda based scheduling using sub-events with automated management functions
US8537890B2 (en) * 2007-03-23 2013-09-17 Ati Technologies Ulc Video decoder with adaptive outputs
US8139632B2 (en) * 2007-03-23 2012-03-20 Advanced Micro Devices, Inc. Video decoder with adaptive outputs
CN117112030B (zh) * 2023-09-12 2024-03-26 南京微盟电子有限公司 一种寄存器组地址自动累加电路及应用方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665412A (en) * 1970-07-20 1972-05-23 Informalique Comp Int Numerical data multi-processor system
US3798591A (en) * 1971-09-28 1974-03-19 Gen Electric Co Ltd Access circuit for a time-shared data processing equipment
JPS50105340A (de) * 1974-01-25 1975-08-20
JPS5110928A (en) * 1974-07-17 1976-01-28 Canon Kk Denjireriizusochio naizoshita ichiganrefukamera
JPS5115336A (de) * 1974-07-29 1976-02-06 Yokogawa Electric Works Ltd
US4056847A (en) * 1976-08-04 1977-11-01 Rca Corporation Priority vector interrupt system
IT1100916B (it) * 1978-11-06 1985-09-28 Honeywell Inf Systems Apparato per gestione di richieste di trasferimento dati in sistemi di elaborazione dati
US4243984A (en) * 1979-03-08 1981-01-06 Texas Instruments Incorporated Video display processor
JPS5636727A (en) * 1979-08-31 1981-04-10 Nec Corp Information transfer system
JPS588348A (ja) * 1981-07-07 1983-01-18 Sony Corp 出力表示用メモリの制御回路
EP0132123A3 (de) * 1983-07-13 1988-08-03 Kabushiki Kaisha Toshiba Steuergerät für Speicheradresse
US4747042A (en) * 1983-12-20 1988-05-24 Ascii Corporation Display control system
US4757312A (en) * 1984-06-29 1988-07-12 Hitachi, Ltd. Image display apparatus
JPS61180291A (ja) * 1985-02-05 1986-08-12 東芝テック株式会社 ドツト文字表示装置
US4704697A (en) * 1985-06-17 1987-11-03 Counterpoint Computers Multiple station video memory
JPS6326726A (ja) * 1986-07-21 1988-02-04 Toshiba Corp 情報処理装置

Also Published As

Publication number Publication date
CA1319421C (en) 1993-06-22
EP0398881A1 (de) 1990-11-28
KR890702134A (ko) 1989-12-22
JPH03501539A (ja) 1991-04-04
EP0398881B1 (de) 1993-09-15
DE3884221D1 (de) 1993-10-21
WO1989005012A1 (en) 1989-06-01
JPH0752467B2 (ja) 1995-06-05
KR960006501B1 (ko) 1996-05-16
US5088053A (en) 1992-02-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee