DE3878276D1 - Tri-state-ausgangsschaltung. - Google Patents

Tri-state-ausgangsschaltung.

Info

Publication number
DE3878276D1
DE3878276D1 DE8888105267T DE3878276T DE3878276D1 DE 3878276 D1 DE3878276 D1 DE 3878276D1 DE 8888105267 T DE8888105267 T DE 8888105267T DE 3878276 T DE3878276 T DE 3878276T DE 3878276 D1 DE3878276 D1 DE 3878276D1
Authority
DE
Germany
Prior art keywords
tri
output switching
state output
state
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888105267T
Other languages
English (en)
Other versions
DE3878276T2 (de
Inventor
Masaji Ueno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3878276D1 publication Critical patent/DE3878276D1/de
Publication of DE3878276T2 publication Critical patent/DE3878276T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
DE8888105267T 1987-03-31 1988-03-31 Tri-state-ausgangsschaltung. Expired - Fee Related DE3878276T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62076474A JPS63245015A (ja) 1987-03-31 1987-03-31 トライステ−ト出力回路

Publications (2)

Publication Number Publication Date
DE3878276D1 true DE3878276D1 (de) 1993-03-25
DE3878276T2 DE3878276T2 (de) 1993-07-29

Family

ID=13606177

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888105267T Expired - Fee Related DE3878276T2 (de) 1987-03-31 1988-03-31 Tri-state-ausgangsschaltung.

Country Status (5)

Country Link
US (1) US4839540A (de)
EP (1) EP0285157B1 (de)
JP (1) JPS63245015A (de)
KR (1) KR910001384B1 (de)
DE (1) DE3878276T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6008687A (en) * 1988-08-29 1999-12-28 Hitachi, Ltd. Switching circuit and display device using the same
US4897564A (en) * 1988-12-27 1990-01-30 International Business Machines Corp. BICMOS driver circuit for high density CMOS logic circuits
JPH033417A (ja) * 1989-05-30 1991-01-09 Nec Corp 半導体集積回路
JP2619080B2 (ja) * 1989-11-29 1997-06-11 株式会社東芝 出力回路
US5070485A (en) * 1990-09-28 1991-12-03 Mts Systems Corporation Low power magnetostrictive sensor
US5153464A (en) * 1990-12-14 1992-10-06 Hewlett-Packard Company Bicmos tri-state output buffer
US5287021A (en) * 1992-05-06 1994-02-15 Motorola, Inc. Low noise BICMOS circuit
JP3140605B2 (ja) * 1993-04-28 2001-03-05 富士通株式会社 出力バッファ回路

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3515901A (en) * 1968-04-01 1970-06-02 North American Rockwell Nand/nor circuit
JPS5490941A (en) * 1977-12-26 1979-07-19 Hitachi Ltd Driving circuit of tristate type
JPS60177723A (ja) * 1984-02-24 1985-09-11 Hitachi Ltd 出力回路
JPH06103837B2 (ja) * 1985-03-29 1994-12-14 株式会社東芝 トライステ−ト形出力回路

Also Published As

Publication number Publication date
US4839540A (en) 1989-06-13
KR910001384B1 (ko) 1991-03-04
EP0285157A2 (de) 1988-10-05
DE3878276T2 (de) 1993-07-29
JPH0552092B2 (de) 1993-08-04
KR880012013A (ko) 1988-10-31
EP0285157A3 (en) 1989-06-07
JPS63245015A (ja) 1988-10-12
EP0285157B1 (de) 1993-02-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee