DE3805487A1 - Verfahren zum trennen von leiterplatten aus einem nutzen - Google Patents

Verfahren zum trennen von leiterplatten aus einem nutzen

Info

Publication number
DE3805487A1
DE3805487A1 DE19883805487 DE3805487A DE3805487A1 DE 3805487 A1 DE3805487 A1 DE 3805487A1 DE 19883805487 DE19883805487 DE 19883805487 DE 3805487 A DE3805487 A DE 3805487A DE 3805487 A1 DE3805487 A1 DE 3805487A1
Authority
DE
Germany
Prior art keywords
circuit boards
printed circuit
benefit
separating
retaining webs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19883805487
Other languages
German (de)
English (en)
Other versions
DE3805487C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Gerold Niegl
Rudolf Lichner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wincor Nixdorf International GmbH
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Priority to DE19883805487 priority Critical patent/DE3805487A1/de
Publication of DE3805487A1 publication Critical patent/DE3805487A1/de
Application granted granted Critical
Publication of DE3805487C2 publication Critical patent/DE3805487C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23P—METAL-WORKING NOT OTHERWISE PROVIDED FOR; COMBINED OPERATIONS; UNIVERSAL MACHINE TOOLS
    • B23P13/00—Making metal objects by operations essentially involving machining but not covered by a single other subclass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/0909—Preformed cutting or breaking line
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mechanical Engineering (AREA)
  • Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)
  • Structure Of Printed Boards (AREA)
DE19883805487 1988-02-22 1988-02-22 Verfahren zum trennen von leiterplatten aus einem nutzen Granted DE3805487A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19883805487 DE3805487A1 (de) 1988-02-22 1988-02-22 Verfahren zum trennen von leiterplatten aus einem nutzen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19883805487 DE3805487A1 (de) 1988-02-22 1988-02-22 Verfahren zum trennen von leiterplatten aus einem nutzen

Publications (2)

Publication Number Publication Date
DE3805487A1 true DE3805487A1 (de) 1989-12-14
DE3805487C2 DE3805487C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1990-04-19

Family

ID=6347905

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19883805487 Granted DE3805487A1 (de) 1988-02-22 1988-02-22 Verfahren zum trennen von leiterplatten aus einem nutzen

Country Status (1)

Country Link
DE (1) DE3805487A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0488468A3 (en) * 1990-11-27 1993-05-12 Bros Italia S.R.L. Device for removing a peduncle from a printed circuit board
US5737834A (en) * 1994-09-20 1998-04-14 Blaupunkt-Werke Gmbh Process and apparatus for automatically assembling the tops and bottoms of circuitboards with SMDS
DE19813193A1 (de) * 1998-03-25 1999-06-10 Siemens Ag Verfahren zum Vereinzeln von elektronischen Modulen
DE19906209C2 (de) * 1999-02-15 2003-03-20 Possehl Electronic Gmbh Verfahren zum Heraustrennen einzelner Schaltkreis-Einheiten aus einem Panel

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4433378C2 (de) * 1994-09-20 1998-04-09 Blaupunkt Werke Gmbh Verfahren zum automatischen Bestücken der Ober- und Unterseite von Leiterplatten mit SMD-Bauteilen

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0155900A2 (en) * 1984-02-09 1985-09-25 PRT PLURITEC ITALIA S.p.A. Contouring method and machine for printed circuits

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0155900A2 (en) * 1984-02-09 1985-09-25 PRT PLURITEC ITALIA S.p.A. Contouring method and machine for printed circuits

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Wellinger, B., Multipanel-Leiterplatten- ein sinnvoller Schritt zur Rationalisierung, Elektronik Produktion & Prüftechnik, 1981, S. 297-299 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0488468A3 (en) * 1990-11-27 1993-05-12 Bros Italia S.R.L. Device for removing a peduncle from a printed circuit board
US5737834A (en) * 1994-09-20 1998-04-14 Blaupunkt-Werke Gmbh Process and apparatus for automatically assembling the tops and bottoms of circuitboards with SMDS
DE19813193A1 (de) * 1998-03-25 1999-06-10 Siemens Ag Verfahren zum Vereinzeln von elektronischen Modulen
DE19906209C2 (de) * 1999-02-15 2003-03-20 Possehl Electronic Gmbh Verfahren zum Heraustrennen einzelner Schaltkreis-Einheiten aus einem Panel

Also Published As

Publication number Publication date
DE3805487C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1990-04-19

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8363 Opposition against the patent
8365 Fully valid after opposition proceedings
8327 Change in the person/name/address of the patent owner

Owner name: SIEMENS NIXDORF INFORMATIONSSYSTEME AG, 33106 PADE

8339 Ceased/non-payment of the annual fee