DE3777839D1 - Geraet zum testen eines datenverarbeitungssystems. - Google Patents
Geraet zum testen eines datenverarbeitungssystems.Info
- Publication number
- DE3777839D1 DE3777839D1 DE8787100004T DE3777839T DE3777839D1 DE 3777839 D1 DE3777839 D1 DE 3777839D1 DE 8787100004 T DE8787100004 T DE 8787100004T DE 3777839 T DE3777839 T DE 3777839T DE 3777839 D1 DE3777839 D1 DE 3777839D1
- Authority
- DE
- Germany
- Prior art keywords
- testing
- data processing
- processing system
- microprocessor
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318572—Input/Output interfaces
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
- G06F11/2733—Test interface between tester and unit under test
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US81909786A | 1986-01-14 | 1986-01-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3777839D1 true DE3777839D1 (de) | 1992-05-07 |
Family
ID=25227190
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8787100004T Expired - Fee Related DE3777839D1 (de) | 1986-01-14 | 1987-01-02 | Geraet zum testen eines datenverarbeitungssystems. |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0230219B1 (de) |
JP (1) | JPS62164140A (de) |
BR (1) | BR8700026A (de) |
DE (1) | DE3777839D1 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03148732A (ja) * | 1989-07-31 | 1991-06-25 | Texas Instr Inc <Ti> | 状態監視器を備えたデータ処理装置 |
DE59009879D1 (de) * | 1989-11-01 | 1995-12-21 | Ciba Geigy Ag | Reaktivfarbstoffe, deren Herstellung und Verwendung. |
EP0462328A1 (de) * | 1990-06-18 | 1991-12-27 | ALCATEL BELL Naamloze Vennootschap | Testanordnung für einen elektronischen Chip |
US5341380A (en) * | 1992-03-19 | 1994-08-23 | Nec Corporation | Large-scale integrated circuit device |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4312066A (en) * | 1979-12-28 | 1982-01-19 | International Business Machines Corporation | Diagnostic/debug machine architecture |
JPS5851292A (ja) * | 1981-09-21 | 1983-03-25 | Matsushita Electric Ind Co Ltd | ロ−タリ−式流体機械 |
JPS60207942A (ja) * | 1984-03-30 | 1985-10-19 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | 記憶コントロ−ラおよび記憶装置検査装置 |
-
1986
- 1986-11-28 JP JP61282233A patent/JPS62164140A/ja active Pending
-
1987
- 1987-01-02 EP EP19870100004 patent/EP0230219B1/de not_active Expired
- 1987-01-02 DE DE8787100004T patent/DE3777839D1/de not_active Expired - Fee Related
- 1987-01-07 BR BR8700026A patent/BR8700026A/pt unknown
Also Published As
Publication number | Publication date |
---|---|
EP0230219A2 (de) | 1987-07-29 |
EP0230219A3 (en) | 1989-04-05 |
JPS62164140A (ja) | 1987-07-20 |
BR8700026A (pt) | 1987-12-01 |
EP0230219B1 (de) | 1992-04-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |