DE3775346D1 - Halbleiter-speicheranordnung mit einer vielzahl von speicherzellen vom ein-transistortyp. - Google Patents

Halbleiter-speicheranordnung mit einer vielzahl von speicherzellen vom ein-transistortyp.

Info

Publication number
DE3775346D1
DE3775346D1 DE8787114591T DE3775346T DE3775346D1 DE 3775346 D1 DE3775346 D1 DE 3775346D1 DE 8787114591 T DE8787114591 T DE 8787114591T DE 3775346 T DE3775346 T DE 3775346T DE 3775346 D1 DE3775346 D1 DE 3775346D1
Authority
DE
Germany
Prior art keywords
variety
transistor type
memory cells
semiconductor memory
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787114591T
Other languages
English (en)
Inventor
Susumu Kurosawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3775346D1 publication Critical patent/DE3775346D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H10B12/373—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate the capacitor extending under or around the transistor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
DE8787114591T 1986-10-07 1987-10-06 Halbleiter-speicheranordnung mit einer vielzahl von speicherzellen vom ein-transistortyp. Expired - Fee Related DE3775346D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61239722A JPH0691212B2 (ja) 1986-10-07 1986-10-07 半導体メモリ

Publications (1)

Publication Number Publication Date
DE3775346D1 true DE3775346D1 (de) 1992-01-30

Family

ID=17048948

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787114591T Expired - Fee Related DE3775346D1 (de) 1986-10-07 1987-10-06 Halbleiter-speicheranordnung mit einer vielzahl von speicherzellen vom ein-transistortyp.

Country Status (4)

Country Link
US (1) US4866494A (de)
EP (1) EP0266572B1 (de)
JP (1) JPH0691212B2 (de)
DE (1) DE3775346D1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01185936A (ja) * 1988-01-21 1989-07-25 Fujitsu Ltd 半導体装置
US5665622A (en) * 1995-03-15 1997-09-09 International Business Machines Corporation Folded trench and rie/deposition process for high-value capacitors
EP0917203A3 (de) * 1997-11-14 2003-02-05 Infineon Technologies AG Gain Cell DRAM Struktur und Verfahren zu deren Herstellung
JP3506645B2 (ja) * 1999-12-13 2004-03-15 Ｎｅｃエレクトロニクス株式会社 半導体装置及びその製造方法
US7102201B2 (en) * 2004-07-15 2006-09-05 International Business Machines Corporation Strained semiconductor device structures
US8299455B2 (en) * 2007-10-15 2012-10-30 International Business Machines Corporation Semiconductor structures having improved contact resistance

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59161860A (ja) * 1983-03-07 1984-09-12 Hitachi Ltd 半導体メモリ装置
EP0169938B1 (de) * 1983-12-15 1989-03-29 Kabushiki Kaisha Toshiba Halbleiterspeichervorrichtung mit einem in einer Rille angeordneten Kondensator
JPS60152058A (ja) * 1984-01-20 1985-08-10 Toshiba Corp 半導体記憶装置
JPS6115362A (ja) * 1984-06-29 1986-01-23 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション ダイナミツクｒａｍセル
US4672410A (en) * 1984-07-12 1987-06-09 Nippon Telegraph & Telephone Semiconductor memory device with trench surrounding each memory cell
JPS61150366A (ja) * 1984-12-25 1986-07-09 Nec Corp Ｍｉｓ型メモリ−セル
US4820652A (en) * 1985-12-11 1989-04-11 Sony Corporation Manufacturing process and structure of semiconductor memory devices

Also Published As

Publication number Publication date
US4866494A (en) 1989-09-12
EP0266572A1 (de) 1988-05-11
EP0266572B1 (de) 1991-12-18
JPH0691212B2 (ja) 1994-11-14
JPS6393147A (ja) 1988-04-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee