DE3773715D1 - Zeitsteuerungssignalgenerator mit doppelter taktfrequenzaufloesung. - Google Patents
Zeitsteuerungssignalgenerator mit doppelter taktfrequenzaufloesung.Info
- Publication number
- DE3773715D1 DE3773715D1 DE8787102622T DE3773715T DE3773715D1 DE 3773715 D1 DE3773715 D1 DE 3773715D1 DE 8787102622 T DE8787102622 T DE 8787102622T DE 3773715 T DE3773715 T DE 3773715T DE 3773715 D1 DE3773715 D1 DE 3773715D1
- Authority
- DE
- Germany
- Prior art keywords
- control signal
- signal generator
- clock frequency
- time control
- frequency resolution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
- H03K5/1506—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
- H03K5/15093—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages using devices arranged in a shift register
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Manipulation Of Pulses (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/843,348 US4882505A (en) | 1986-03-24 | 1986-03-24 | Fully synchronous half-frequency clock generator |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3773715D1 true DE3773715D1 (de) | 1991-11-21 |
Family
ID=25289716
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8787102622T Expired - Fee Related DE3773715D1 (de) | 1986-03-24 | 1987-02-24 | Zeitsteuerungssignalgenerator mit doppelter taktfrequenzaufloesung. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4882505A (de) |
EP (1) | EP0238874B1 (de) |
JP (1) | JPH0834412B2 (de) |
DE (1) | DE3773715D1 (de) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5018111A (en) * | 1988-12-27 | 1991-05-21 | Intel Corporation | Timing circuit for memory employing reset function |
US4992676A (en) * | 1989-05-01 | 1991-02-12 | Motorola, Inc. | Output buffer having distributed stages to reduce switching noise |
JPH0313122A (ja) * | 1989-06-12 | 1991-01-22 | Mitsubishi Electric Corp | 分周回路 |
US5128554A (en) * | 1991-02-14 | 1992-07-07 | Motorola, Inc. | Opposite phase clock generator circuit |
US5175753A (en) * | 1991-04-01 | 1992-12-29 | Advanced Micro Devices, Inc. | Counter cell including a latch circuit, control circuit and a pull-up circuit |
JPH0528289A (ja) * | 1991-07-24 | 1993-02-05 | Nec Corp | レジスタ制御回路 |
EP0569658B1 (de) * | 1992-05-15 | 1998-08-12 | STMicroelectronics S.r.l. | Generator für Signale mit höher Frequenz und nicht-überlappenden Phasen |
DE69315010T2 (de) * | 1992-08-20 | 1998-04-16 | Koninkl Philips Electronics Nv | Oszillator mit mehrphasigen Ausgängen |
US5359635A (en) * | 1993-04-19 | 1994-10-25 | Codex, Corp. | Programmable frequency divider in a phase lock loop |
JP3643385B2 (ja) * | 1993-05-19 | 2005-04-27 | 株式会社東芝 | 半導体回路装置 |
GB9615422D0 (en) * | 1996-07-23 | 1996-09-04 | 3Com Ireland | Digital phase locked loop |
US5952863A (en) * | 1996-12-09 | 1999-09-14 | Texas Instruments Incorporated | Circuit and method for generating non-overlapping clock signals for an integrated circuit |
TW483251B (en) * | 2000-11-23 | 2002-04-11 | Macronix Int Co Ltd | Clock generator with stable frequency |
WO2004036734A2 (en) * | 2002-10-16 | 2004-04-29 | Koninklijke Philips Electronics N.V. | Pulse generator |
US9520865B2 (en) * | 2014-09-04 | 2016-12-13 | Qualcomm Incorporated | Delay circuits and related systems and methods |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3290606A (en) * | 1963-09-27 | 1966-12-06 | Rca Corp | Electronic circuit producing pulse sequences of different rates |
DE1293206B (de) * | 1966-03-12 | 1969-04-24 | Vyzk Ustav Matemat Stroju | Schaltungsanordnung zur Erzeugung von Schwingungen |
US3322974A (en) * | 1966-03-14 | 1967-05-30 | Rca Corp | Flip-flop adaptable for counter comprising inverters and inhibitable gates and in cooperation with overlapping clocks for temporarily maintaining complementary outputs at same digital level |
GB1305029A (de) * | 1969-11-13 | 1973-01-31 | ||
US3745371A (en) * | 1970-08-11 | 1973-07-10 | Tokyo Shibaura Electric Co | Shift register using insulated gate field effect transistors |
US3657557A (en) * | 1970-10-19 | 1972-04-18 | Gen Instrument Corp | Synchronous binary counter |
US3720841A (en) * | 1970-12-29 | 1973-03-13 | Tokyo Shibaura Electric Co | Logical circuit arrangement |
US3704452A (en) * | 1970-12-31 | 1972-11-28 | Ibm | Shift register storage unit |
GB1381963A (en) * | 1971-05-07 | 1975-01-29 | Tokyo Shibaura Electric Co | Counter using insulated gate field effect transistors |
US3829713A (en) * | 1973-02-12 | 1974-08-13 | Intersil Inc | Cmos digital division network |
US3930169A (en) * | 1973-09-27 | 1975-12-30 | Motorola Inc | Cmos odd multiple repetition rate divider circuit |
US3838293A (en) * | 1973-10-11 | 1974-09-24 | Ncr | Three clock phase, four transistor per stage shift register |
US3946255A (en) * | 1974-04-25 | 1976-03-23 | Honeywell Inc. | Signal generator |
JPS5331697B2 (de) * | 1974-06-08 | 1978-09-04 | ||
US4002926A (en) * | 1975-10-02 | 1977-01-11 | Hughes Aircraft Company | High speed divide-by-N circuit |
US4236121A (en) * | 1978-04-05 | 1980-11-25 | Massachusetts Institute Of Technology | Oscillators including charge-flow transistor logic elements |
US4250406A (en) * | 1978-12-21 | 1981-02-10 | Motorola, Inc. | Single clock CMOS logic circuit with selected threshold voltages |
JPS5937611B2 (ja) * | 1979-01-17 | 1984-09-11 | 株式会社日本自動車部品総合研究所 | 抵抗容量型発振回路 |
JPS5974724A (ja) * | 1982-10-21 | 1984-04-27 | Sony Corp | パルス発生回路 |
JP2985484B2 (ja) * | 1992-03-19 | 1999-11-29 | 株式会社日立製作所 | 半導体装置とその製造方法 |
-
1986
- 1986-03-24 US US06/843,348 patent/US4882505A/en not_active Expired - Fee Related
-
1987
- 1987-02-06 JP JP62024893A patent/JPH0834412B2/ja not_active Expired - Lifetime
- 1987-02-24 EP EP87102622A patent/EP0238874B1/de not_active Expired
- 1987-02-24 DE DE8787102622T patent/DE3773715D1/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPS62231512A (ja) | 1987-10-12 |
EP0238874A2 (de) | 1987-09-30 |
EP0238874B1 (de) | 1991-10-16 |
JPH0834412B2 (ja) | 1996-03-29 |
EP0238874A3 (en) | 1989-02-01 |
US4882505A (en) | 1989-11-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |