DE3670741D1 - Taktsignal-regeneratoranordnung. - Google Patents

Taktsignal-regeneratoranordnung.

Info

Publication number
DE3670741D1
DE3670741D1 DE8686201306T DE3670741T DE3670741D1 DE 3670741 D1 DE3670741 D1 DE 3670741D1 DE 8686201306 T DE8686201306 T DE 8686201306T DE 3670741 T DE3670741 T DE 3670741T DE 3670741 D1 DE3670741 D1 DE 3670741D1
Authority
DE
Germany
Prior art keywords
clock signal
signal regenerator
regenerator arrangement
arrangement
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686201306T
Other languages
English (en)
Inventor
Herman C O Int Octrooi Zoetman
Robert J M Verbeek
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3670741D1 publication Critical patent/DE3670741D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
DE8686201306T 1985-08-13 1986-07-23 Taktsignal-regeneratoranordnung. Expired - Lifetime DE3670741D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL8502234A NL8502234A (nl) 1985-08-13 1985-08-13 Kloksignaalinrichting voor het regeneren van een kloksignaal.

Publications (1)

Publication Number Publication Date
DE3670741D1 true DE3670741D1 (de) 1990-05-31

Family

ID=19846415

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686201306T Expired - Lifetime DE3670741D1 (de) 1985-08-13 1986-07-23 Taktsignal-regeneratoranordnung.

Country Status (5)

Country Link
US (1) US4686482A (de)
EP (1) EP0214676B1 (de)
JP (1) JPS6249737A (de)
DE (1) DE3670741D1 (de)
NL (1) NL8502234A (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4835481A (en) * 1986-09-30 1989-05-30 Siemens Aktiengesellschaft Circuit arrangement for generating a clock signal which is synchronous in respect of frequency to a reference frequency
JPS63238714A (ja) * 1986-11-26 1988-10-04 Hitachi Ltd クロック供給システム
FR2627653B1 (fr) * 1988-02-18 1994-04-08 Alcatel Thomson Faisceaux Hertzi Procede d'asservissement de l'instant de regeneration dans une transmission numerique utilisant une modulation de porteuse selon deux axes en quadrature et dispositif de mise en oeuvre de ce procede
US5095280A (en) * 1990-11-26 1992-03-10 Integrated Circuit Systems, Inc. Dual dot clock signal generator
TW242204B (de) * 1991-12-09 1995-03-01 Philips Nv
US5481573A (en) * 1992-06-26 1996-01-02 International Business Machines Corporation Synchronous clock distribution system
US5486783A (en) * 1994-10-31 1996-01-23 At&T Corp. Method and apparatus for providing clock de-skewing on an integrated circuit board
JPH08316805A (ja) * 1995-05-16 1996-11-29 Nec Corp 周波数差検出回路
US6182236B1 (en) * 1998-08-26 2001-01-30 Compaq Computer Corporation Circuit and method employing feedback for driving a clocking signal to compensate for load-induced skew
US7124221B1 (en) 1999-10-19 2006-10-17 Rambus Inc. Low latency multi-level communication interface
JP4236998B2 (ja) * 2003-02-19 2009-03-11 株式会社神戸製鋼所 発振器
US8861667B1 (en) 2002-07-12 2014-10-14 Rambus Inc. Clock data recovery circuit with equalizer clock calibration

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3849733A (en) * 1973-05-23 1974-11-19 Bell Telephone Labor Inc Interface apparatus for receiving and monitoring pilot signals which control a timing signal generator
GB2040128B (en) * 1978-12-11 1983-03-09 Racal Ltd Signal processing circuits
GB2120878B (en) * 1982-05-07 1985-11-06 Philips Electronic Associated Phase-locked-loops

Also Published As

Publication number Publication date
JPS6249737A (ja) 1987-03-04
EP0214676A1 (de) 1987-03-18
US4686482A (en) 1987-08-11
NL8502234A (nl) 1987-03-02
EP0214676B1 (de) 1990-04-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee