GB2040128B - Signal processing circuits - Google Patents

Signal processing circuits

Info

Publication number
GB2040128B
GB2040128B GB7942702A GB7942702A GB2040128B GB 2040128 B GB2040128 B GB 2040128B GB 7942702 A GB7942702 A GB 7942702A GB 7942702 A GB7942702 A GB 7942702A GB 2040128 B GB2040128 B GB 2040128B
Authority
GB
United Kingdom
Prior art keywords
signal processing
processing circuits
circuits
signal
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB7942702A
Other versions
GB2040128A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RACAL Ltd
Original Assignee
RACAL Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RACAL Ltd filed Critical RACAL Ltd
Priority to GB7942702A priority Critical patent/GB2040128B/en
Publication of GB2040128A publication Critical patent/GB2040128A/en
Application granted granted Critical
Publication of GB2040128B publication Critical patent/GB2040128B/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00—Demodulation of amplitude-modulated oscillations
    • H03D1/22—Homodyne or synchrodyne circuits
    • H03D1/2281—Homodyne or synchrodyne circuits using a phase locked loop
GB7942702A 1978-12-11 1979-12-11 Signal processing circuits Expired GB2040128B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB7942702A GB2040128B (en) 1978-12-11 1979-12-11 Signal processing circuits

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB7848018 1978-12-11
GB7942702A GB2040128B (en) 1978-12-11 1979-12-11 Signal processing circuits

Publications (2)

Publication Number Publication Date
GB2040128A GB2040128A (en) 1980-08-20
GB2040128B true GB2040128B (en) 1983-03-09

Family

ID=26269925

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7942702A Expired GB2040128B (en) 1978-12-11 1979-12-11 Signal processing circuits

Country Status (1)

Country Link
GB (1) GB2040128B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8502234A (en) * 1985-08-13 1987-03-02 Philips Nv CLOCK SIGNAL DEVICE FOR RAINING A CLOCK SIGNAL.
FR3091430B1 (en) * 2018-12-27 2021-02-26 Avantix PHASE CALIBRATION PROCESS OF AN ELECTRONIC CIRCUIT REALIZING THE CONSISTENT SUMMATION OF TWO PHASE LOCKING LOOPS

Also Published As

Publication number Publication date
GB2040128A (en) 1980-08-20

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee