DE3750014T2 - Datenprozessor mit der Fähigkeit, die Verzweigungsadresse sofort zu berechnen in einer Relativadressenverzweigung. - Google Patents

Datenprozessor mit der Fähigkeit, die Verzweigungsadresse sofort zu berechnen in einer Relativadressenverzweigung.

Info

Publication number
DE3750014T2
DE3750014T2 DE19873750014 DE3750014T DE3750014T2 DE 3750014 T2 DE3750014 T2 DE 3750014T2 DE 19873750014 DE19873750014 DE 19873750014 DE 3750014 T DE3750014 T DE 3750014T DE 3750014 T2 DE3750014 T2 DE 3750014T2
Authority
DE
Germany
Prior art keywords
branch
address
ability
data processor
instantly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19873750014
Other languages
English (en)
Other versions
DE3750014D1 (de
Inventor
Manabu C O Nec Corporat Kimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3750014D1 publication Critical patent/DE3750014D1/de
Publication of DE3750014T2 publication Critical patent/DE3750014T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/324—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address using program counter relative addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/321—Program or instruction counter, e.g. incrementing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System (AREA)
  • Advance Control (AREA)
DE19873750014 1986-10-29 1987-10-29 Datenprozessor mit der Fähigkeit, die Verzweigungsadresse sofort zu berechnen in einer Relativadressenverzweigung. Expired - Fee Related DE3750014T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61258917A JPH0831033B2 (ja) 1986-10-29 1986-10-29 データ処理装置

Publications (2)

Publication Number Publication Date
DE3750014D1 DE3750014D1 (de) 1994-07-14
DE3750014T2 true DE3750014T2 (de) 1995-01-12

Family

ID=17326823

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19873750014 Expired - Fee Related DE3750014T2 (de) 1986-10-29 1987-10-29 Datenprozessor mit der Fähigkeit, die Verzweigungsadresse sofort zu berechnen in einer Relativadressenverzweigung.

Country Status (3)

Country Link
EP (1) EP0265948B1 (de)
JP (1) JPH0831033B2 (de)
DE (1) DE3750014T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4340551A1 (de) * 1993-11-29 1995-06-01 Philips Patentverwaltung Programmspeichererweiterung für einen Mikroprozessor
EP0730220A3 (de) * 1995-03-03 1997-01-08 Hal Computer Systems Inc Verfahren und Vorrichtung zur schnellen Ausführung von Verzweigungsbefehlen
US5958039A (en) * 1997-10-28 1999-09-28 Microchip Technology Incorporated Master-slave latches and post increment/decrement operations
JP4920960B2 (ja) * 2005-11-24 2012-04-18 朝日ウッドテック株式会社 木質床構造および木質床の施工方法
JP2007327290A (ja) * 2006-06-09 2007-12-20 Yuka Sansho Kenzai Kk 床構造の構築方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3774166A (en) * 1963-09-30 1973-11-20 F Vigliante Short-range data processing transfers
JPS5343448A (en) * 1976-10-01 1978-04-19 Hitachi Ltd Lsi sequence control circuit
JPS5563442A (en) * 1978-11-07 1980-05-13 Fujitsu Ltd Address set control system
JPS55103653A (en) * 1979-01-31 1980-08-08 Nec Corp Data processing unit
US4449185A (en) * 1981-11-30 1984-05-15 Rca Corporation Implementation of instruction for a branch which can cross one page boundary
JPS5911451A (ja) * 1982-07-13 1984-01-21 Nec Corp 分岐制御方式
JPS617945A (ja) * 1984-06-22 1986-01-14 Usac Electronics Ind Co Ltd 実効アドレス計算方式

Also Published As

Publication number Publication date
EP0265948A3 (en) 1990-05-02
DE3750014D1 (de) 1994-07-14
JPS63111535A (ja) 1988-05-16
EP0265948A2 (de) 1988-05-04
EP0265948B1 (de) 1994-06-08
JPH0831033B2 (ja) 1996-03-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee