DE3650359D1 - Asynchrone reihen- und spaltensteuerung. - Google Patents

Asynchrone reihen- und spaltensteuerung.

Info

Publication number
DE3650359D1
DE3650359D1 DE3650359T DE3650359T DE3650359D1 DE 3650359 D1 DE3650359 D1 DE 3650359D1 DE 3650359 T DE3650359 T DE 3650359T DE 3650359 T DE3650359 T DE 3650359T DE 3650359 D1 DE3650359 D1 DE 3650359D1
Authority
DE
Germany
Prior art keywords
column control
asynchronous row
asynchronous
row
column
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3650359T
Other languages
English (en)
Other versions
DE3650359T2 (de
Inventor
Stephen Flannagan
Paul Reed
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of DE3650359D1 publication Critical patent/DE3650359D1/de
Publication of DE3650359T2 publication Critical patent/DE3650359T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
DE3650359T 1985-08-05 1986-05-27 Asynchrone reihen- und spaltensteuerung. Expired - Fee Related DE3650359T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/762,341 US4661931A (en) 1985-08-05 1985-08-05 Asynchronous row and column control
PCT/US1986/001131 WO1987000961A1 (en) 1985-08-05 1986-05-27 Asynchronous row and column control

Publications (2)

Publication Number Publication Date
DE3650359D1 true DE3650359D1 (de) 1995-09-07
DE3650359T2 DE3650359T2 (de) 1996-03-21

Family

ID=25064769

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3650359T Expired - Fee Related DE3650359T2 (de) 1985-08-05 1986-05-27 Asynchrone reihen- und spaltensteuerung.

Country Status (6)

Country Link
US (1) US4661931A (de)
EP (1) EP0226616B1 (de)
JP (1) JPH0770218B2 (de)
KR (1) KR920009703B1 (de)
DE (1) DE3650359T2 (de)
WO (1) WO1987000961A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0640439B2 (ja) * 1986-02-17 1994-05-25 日本電気株式会社 半導体記憶装置
KR880008330A (ko) * 1986-12-30 1988-08-30 강진구 스테이틱 램의 프리차아지 시스템
JP2569554B2 (ja) * 1987-05-13 1997-01-08 三菱電機株式会社 ダイナミツクｒａｍ
US5193076A (en) * 1988-12-22 1993-03-09 Texas Instruments Incorporated Control of sense amplifier latch timing
US5018106A (en) * 1989-04-27 1991-05-21 Vlsi Technology, Inc. Static random access memory with modulated loads
JP2892757B2 (ja) * 1990-03-23 1999-05-17 三菱電機株式会社 半導体集積回路装置
US5243572A (en) * 1992-01-15 1993-09-07 Motorola, Inc. Deselect circuit
US5327394A (en) * 1992-02-04 1994-07-05 Micron Technology, Inc. Timing and control circuit for a static RAM responsive to an address transition pulse
JPH06162776A (ja) * 1992-11-18 1994-06-10 Nec Corp 半導体メモリ回路
US5592426A (en) * 1993-10-29 1997-01-07 International Business Machines Corporation Extended segmented precharge architecture
JP3208624B2 (ja) * 1993-11-25 2001-09-17 ソニー株式会社 半導体記憶装置
US5729493A (en) * 1996-08-23 1998-03-17 Motorola Inc. Memory suitable for operation at low power supply voltages and sense amplifier therefor
AR053672A1 (es) * 2005-02-04 2007-05-16 Oxane Materials Inc Una composicion y metodo para hacer un entibador
US11011238B2 (en) 2018-06-28 2021-05-18 Taiwan Semiconductor Manufacturing Company, Ltd. Floating data line circuits and methods

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4337525A (en) * 1979-04-17 1982-06-29 Nippon Electric Co., Ltd. Asynchronous circuit responsive to changes in logic level
GB2070372B (en) * 1980-01-31 1983-09-28 Tokyo Shibaura Electric Co Semiconductor memory device
US4338679A (en) * 1980-12-24 1982-07-06 Mostek Corporation Row driver circuit for semiconductor memory
JPS5956292A (ja) * 1982-09-24 1984-03-31 Hitachi Ltd 半導体記憶装置
JPS59178685A (ja) * 1983-03-30 1984-10-09 Toshiba Corp 半導体記憶回路
JPS59221891A (ja) * 1983-05-31 1984-12-13 Toshiba Corp スタテイツク型半導体記憶装置
JPH0762958B2 (ja) * 1983-06-03 1995-07-05 株式会社日立製作所 Ｍｏｓ記憶装置
JPS6061985A (ja) * 1983-09-14 1985-04-09 Mitsubishi Electric Corp 半導体記憶装置
JPS60119691A (ja) * 1983-11-30 1985-06-27 Nec Corp メモリ回路

Also Published As

Publication number Publication date
DE3650359T2 (de) 1996-03-21
WO1987000961A1 (en) 1987-02-12
EP0226616A1 (de) 1987-07-01
US4661931A (en) 1987-04-28
JPH0770218B2 (ja) 1995-07-31
JPS63500551A (ja) 1988-02-25
EP0226616B1 (de) 1995-08-02
KR880700426A (ko) 1988-03-15
KR920009703B1 (ko) 1992-10-22
EP0226616A4 (de) 1990-01-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee