DE3613895C2 - - Google Patents
Info
- Publication number
- DE3613895C2 DE3613895C2 DE3613895A DE3613895A DE3613895C2 DE 3613895 C2 DE3613895 C2 DE 3613895C2 DE 3613895 A DE3613895 A DE 3613895A DE 3613895 A DE3613895 A DE 3613895A DE 3613895 C2 DE3613895 C2 DE 3613895C2
- Authority
- DE
- Germany
- Prior art keywords
- current
- bit
- digital
- value
- inputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0863—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches
- H03M1/0881—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches by forcing a gradual change from one output level to the next, e.g. soft-start
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60087849A JPS61245718A (ja) | 1985-04-24 | 1985-04-24 | デイジタル−アナログ変換器 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3613895A1 DE3613895A1 (de) | 1986-10-30 |
DE3613895C2 true DE3613895C2 (US06582424-20030624-M00016.png) | 1990-05-17 |
Family
ID=13926331
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19863613895 Granted DE3613895A1 (de) | 1985-04-24 | 1986-04-24 | Digital/analog-umsetzer mit hoher ausgangs-compliance |
Country Status (3)
Country | Link |
---|---|
US (1) | US4751497A (US06582424-20030624-M00016.png) |
JP (1) | JPS61245718A (US06582424-20030624-M00016.png) |
DE (1) | DE3613895A1 (US06582424-20030624-M00016.png) |
Families Citing this family (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3729390A1 (de) * | 1987-09-03 | 1989-03-16 | Messerschmitt Boelkow Blohm | Wellenlaengenunabhaengiger optischer digital-analog-wandler |
US5008671A (en) * | 1988-06-27 | 1991-04-16 | Analog Devices, Incorporated | High-speed digital-to-analog converter with BiMOS cell structure |
JPH04251389A (ja) * | 1991-01-08 | 1992-09-07 | Canon Inc | 演算装置 |
JP3169884B2 (ja) * | 1998-02-26 | 2001-05-28 | 日本電気アイシーマイコンシステム株式会社 | ディジタル・アナログ変換器及びそのテスト方法 |
DE19909773A1 (de) * | 1999-03-05 | 2000-09-14 | Siemens Ag | Verstärkerschaltvorrichtung |
US6310419B1 (en) * | 2000-04-05 | 2001-10-30 | Jds Uniphase Inc. | Resistor array devices including switch contacts operated by microelectromechanical actuators and methods for fabricating the same |
US7173551B2 (en) | 2000-12-21 | 2007-02-06 | Quellan, Inc. | Increasing data throughput in optical fiber transmission systems |
US7307569B2 (en) | 2001-03-29 | 2007-12-11 | Quellan, Inc. | Increasing data throughput in optical fiber transmission systems |
US7149256B2 (en) | 2001-03-29 | 2006-12-12 | Quellan, Inc. | Multilevel pulse position modulation for efficient fiber optic communication |
WO2002082694A1 (en) | 2001-04-04 | 2002-10-17 | Quellan, Inc. | Method and system for decoding multilevel signals |
AU2003211094A1 (en) | 2002-02-15 | 2003-09-09 | Quellan, Inc. | Multi-level signal clock recovery technique |
AU2003217947A1 (en) * | 2002-03-08 | 2003-09-22 | Quellan, Inc. | High speed analog-to-digital converter using a unique gray code having minimal bit transitions |
AU2003223687A1 (en) * | 2002-04-23 | 2003-11-10 | Quellan, Inc. | Combined ask/dpsk modulation system |
JP2004013681A (ja) * | 2002-06-10 | 2004-01-15 | Bosu & K Consulting Kk | 名刺情報管理システム |
AU2003256569A1 (en) | 2002-07-15 | 2004-02-02 | Quellan, Inc. | Adaptive noise filtering and equalization |
AU2003287628A1 (en) * | 2002-11-12 | 2004-06-03 | Quellan, Inc. | High-speed analog-to-digital conversion with improved robustness to timing uncertainty |
US7804760B2 (en) | 2003-08-07 | 2010-09-28 | Quellan, Inc. | Method and system for signal emulation |
DE112004001455B4 (de) | 2003-08-07 | 2020-04-23 | Intersil Americas LLC | Verfahren und System zum Löschen von Übersprechen |
US7123676B2 (en) | 2003-11-17 | 2006-10-17 | Quellan, Inc. | Method and system for antenna interference cancellation |
US7616700B2 (en) | 2003-12-22 | 2009-11-10 | Quellan, Inc. | Method and system for slicing a communication signal |
US7042381B1 (en) * | 2004-10-29 | 2006-05-09 | Broadcom Corporation | Delay equalized Z/2Z ladder for digital to analog conversion |
US7132970B2 (en) * | 2004-10-29 | 2006-11-07 | Broadcom Corporation | Delay equalized Z/2Z ladder for digital to analog conversion |
US7725079B2 (en) | 2004-12-14 | 2010-05-25 | Quellan, Inc. | Method and system for automatic control in an interference cancellation device |
US7522883B2 (en) * | 2004-12-14 | 2009-04-21 | Quellan, Inc. | Method and system for reducing signal interference |
US7212144B1 (en) * | 2006-01-18 | 2007-05-01 | Marvell World Trade Ltd. | Flash ADC |
KR101372361B1 (ko) | 2006-04-26 | 2014-03-12 | 인터실 아메리카스 엘엘씨 | 통신 채널로부터 복사성 방출을 감소시키기 위한 방법 및 시스템 |
US7817073B2 (en) * | 2007-06-15 | 2010-10-19 | Micron Technology, Inc. | Integrators for delta-sigma modulators |
DE602007009217D1 (de) * | 2007-07-27 | 2010-10-28 | Fujitsu Semiconductor Ltd | Schaltung |
TWM339079U (en) * | 2008-01-02 | 2008-08-21 | Mstar Semiconductor Inc | Voltage generating circuit |
US7916057B2 (en) * | 2009-04-27 | 2011-03-29 | Linear Technology Corporation | Complex-admittance digital-to-analog converter |
US7965212B1 (en) * | 2010-02-12 | 2011-06-21 | Bae Systems Information And Electronic Systems Integration Inc. | DAC circuit using summing junction delay compensation |
US8860597B2 (en) * | 2011-07-06 | 2014-10-14 | Qualcomm Incorporated | Digital to-analog converter circuitry with weighted resistance elements |
US9178524B1 (en) * | 2014-05-27 | 2015-11-03 | Qualcomm Incorporated | Hybrid R-2R structure for low glitch noise segmented DAC |
US9621181B2 (en) * | 2015-04-01 | 2017-04-11 | National Cheng Kung University | Digital to analog converter with output impedance compensation |
CN109428571B (zh) * | 2017-09-05 | 2022-06-21 | 瑞昱半导体股份有限公司 | 数据转换器及其阻抗匹配的控制方法 |
CN109586725B (zh) * | 2018-12-22 | 2023-04-28 | 成都华微科技有限公司 | 超高精度r-2r电阻网络开关阵列 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3579023A (en) * | 1969-03-28 | 1971-05-18 | Honeywell Inc | Control apparatus |
JPS52108766A (en) * | 1976-03-09 | 1977-09-12 | Hitachi Ltd | High speed load resistance network |
NL7902633A (nl) * | 1979-04-04 | 1980-10-07 | Philips Nv | Elektronische schakelaar. |
-
1985
- 1985-04-24 JP JP60087849A patent/JPS61245718A/ja active Pending
-
1986
- 1986-04-18 US US06/853,688 patent/US4751497A/en not_active Expired - Fee Related
- 1986-04-24 DE DE19863613895 patent/DE3613895A1/de active Granted
Also Published As
Publication number | Publication date |
---|---|
DE3613895A1 (de) | 1986-10-30 |
JPS61245718A (ja) | 1986-11-01 |
US4751497A (en) | 1988-06-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
D2 | Grant after examination | ||
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |