DE3583308D1 - Verfahren zur herstellung von kontaktloechern mit abgeschraegten vertikalen waenden in einer polymerschicht. - Google Patents

Verfahren zur herstellung von kontaktloechern mit abgeschraegten vertikalen waenden in einer polymerschicht.

Info

Publication number
DE3583308D1
DE3583308D1 DE8585104229T DE3583308T DE3583308D1 DE 3583308 D1 DE3583308 D1 DE 3583308D1 DE 8585104229 T DE8585104229 T DE 8585104229T DE 3583308 T DE3583308 T DE 3583308T DE 3583308 D1 DE3583308 D1 DE 3583308D1
Authority
DE
Germany
Prior art keywords
polymer layer
contact holes
vertical walls
producing contact
angled vertical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585104229T
Other languages
English (en)
Inventor
Hiroyuki Hiraoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3583308D1 publication Critical patent/DE3583308D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
DE8585104229T 1984-05-21 1985-04-11 Verfahren zur herstellung von kontaktloechern mit abgeschraegten vertikalen waenden in einer polymerschicht. Expired - Fee Related DE3583308D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/612,189 US4482427A (en) 1984-05-21 1984-05-21 Process for forming via holes having sloped walls

Publications (1)

Publication Number Publication Date
DE3583308D1 true DE3583308D1 (de) 1991-08-01

Family

ID=24452120

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585104229T Expired - Fee Related DE3583308D1 (de) 1984-05-21 1985-04-11 Verfahren zur herstellung von kontaktloechern mit abgeschraegten vertikalen waenden in einer polymerschicht.

Country Status (4)

Country Link
US (1) US4482427A (de)
EP (1) EP0163074B1 (de)
JP (1) JPS60251628A (de)
DE (1) DE3583308D1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59111102A (ja) * 1982-12-16 1984-06-27 Nippon Denso Co Ltd 防眩型反射鏡
US4830706A (en) * 1986-10-06 1989-05-16 International Business Machines Corporation Method of making sloped vias
EP0327336B1 (de) * 1988-02-01 1997-12-10 Semiconductor Energy Laboratory Co., Ltd. Elektronische Anordnungen mit Kohlenstoffschichten
US5840402A (en) * 1994-06-24 1998-11-24 Sheldahl, Inc. Metallized laminate material having ordered distribution of conductive through holes
EP0862789A4 (de) * 1995-11-22 1999-07-07 Olin Corp Halbleiterpackung mit masse- oder versorgungsring
AUPO281896A0 (en) * 1996-10-04 1996-10-31 Unisearch Limited Reactive ion etching of silica structures for integrated optics applications
JP5846077B2 (ja) * 2012-08-22 2016-01-20 株式会社デンソー 樹脂膜のパターニング方法およびそれを用いたセンサの製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1109829B (it) * 1977-07-05 1985-12-23 Ibm Processo di fabbricazione di cercuiti integrati
US4209356A (en) * 1978-10-18 1980-06-24 General Electric Company Selective etching of polymeric materials embodying silicones via reactor plasmas
US4357203A (en) * 1981-12-30 1982-11-02 Rca Corporation Plasma etching of polyimide

Also Published As

Publication number Publication date
JPH0464457B2 (de) 1992-10-15
EP0163074A2 (de) 1985-12-04
US4482427A (en) 1984-11-13
EP0163074B1 (de) 1991-06-26
EP0163074A3 (en) 1988-11-02
JPS60251628A (ja) 1985-12-12

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DE3583308D1 (de) Verfahren zur herstellung von kontaktloechern mit abgeschraegten vertikalen waenden in einer polymerschicht.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee