DE3570556D1 - Self-aligned metal-semiconductor field effect transistor - Google Patents

Self-aligned metal-semiconductor field effect transistor

Info

Publication number
DE3570556D1
DE3570556D1 DE8585108697T DE3570556T DE3570556D1 DE 3570556 D1 DE3570556 D1 DE 3570556D1 DE 8585108697 T DE8585108697 T DE 8585108697T DE 3570556 T DE3570556 T DE 3570556T DE 3570556 D1 DE3570556 D1 DE 3570556D1
Authority
DE
Germany
Prior art keywords
self
field effect
effect transistor
semiconductor field
aligned metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8585108697T
Other languages
English (en)
Inventor
Christopher Frank Codella
Seiki Ogura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3570556D1 publication Critical patent/DE3570556D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H01L29/66856—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
    • H01L29/66863—Lateral single gate transistors
    • H01L29/66878—Processes wherein the final gate is made before the formation, e.g. activation anneal, of the source and drain regions in the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0891—Source or drain regions of field-effect devices of field-effect transistors with Schottky gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/90—MOSFET type gate sidewall insulating spacer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Junction Field-Effect Transistors (AREA)
DE8585108697T 1984-08-27 1985-07-12 Self-aligned metal-semiconductor field effect transistor Expired DE3570556D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/644,830 US4636822A (en) 1984-08-27 1984-08-27 GaAs short channel lightly doped drain MESFET structure and fabrication

Publications (1)

Publication Number Publication Date
DE3570556D1 true DE3570556D1 (en) 1989-06-29

Family

ID=24586502

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585108697T Expired DE3570556D1 (en) 1984-08-27 1985-07-12 Self-aligned metal-semiconductor field effect transistor

Country Status (4)

Country Link
US (1) US4636822A (de)
EP (1) EP0175864B1 (de)
JP (1) JPS6155973A (de)
DE (1) DE3570556D1 (de)

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EP0181091B1 (de) * 1984-11-02 1990-06-13 Kabushiki Kaisha Toshiba Feldeffekttransistor mit einem Schottky-Gate und Herstellungsverfahren dafür
US5187111A (en) * 1985-09-27 1993-02-16 Kabushiki Kaisha Toshiba Method of manufacturing Schottky barrier gate FET
JPS6279673A (ja) * 1985-10-03 1987-04-13 Mitsubishi Electric Corp 電界効果トランジスタ
US4847212A (en) * 1987-01-12 1989-07-11 Itt Gallium Arsenide Technology Center Self-aligned gate FET process using undercut etch mask
JPS62128175A (ja) * 1985-11-29 1987-06-10 Hitachi Ltd 半導体装置
US4859618A (en) * 1986-11-20 1989-08-22 Sumitomo Electric Industries, Ltd. Method of producing the gate electrode of a field effect transistor
US4933295A (en) * 1987-05-08 1990-06-12 Raytheon Company Method of forming a bipolar transistor having closely spaced device regions
JPH01175260A (ja) * 1987-12-29 1989-07-11 Nec Corp 絶縁ゲート電界効果トランジスタの製造方法
EP0348944B1 (de) * 1988-06-28 1997-10-22 Nec Corporation Halbleitervorrichtung mit Verbindungshalbleiterfet mit E/D-Struktur mit hoher Geräuschmarge
US4898835A (en) * 1988-10-12 1990-02-06 Sgs-Thomson Microelectronics, Inc. Single mask totally self-aligned power MOSFET cell fabrication process
US5143857A (en) * 1988-11-07 1992-09-01 Triquint Semiconductor, Inc. Method of fabricating an electronic device with reduced susceptiblity to backgating effects
JPH02271537A (ja) * 1989-04-12 1990-11-06 Mitsubishi Electric Corp 半導体装置及びその製造方法
US5134447A (en) * 1989-09-22 1992-07-28 At&T Bell Laboratories Neutral impurities to increase lifetime of operation of semiconductor devices
US4963501A (en) * 1989-09-25 1990-10-16 Rockwell International Corporation Method of fabricating semiconductor devices with sub-micron linewidths
JP2679333B2 (ja) * 1990-02-26 1997-11-19 日本電気株式会社 ショットキー障壁接合ゲート型電界効果トランジスタ
JPH0475351A (ja) * 1990-07-17 1992-03-10 Mitsubishi Electric Corp 化合物半導体装置の製造方法
US5182218A (en) * 1991-02-25 1993-01-26 Sumitomo Electric Industries, Ltd. Production methods for compound semiconductor device having lightly doped drain structure
EP0501275A3 (en) * 1991-03-01 1992-11-19 Motorola, Inc. Method of making symmetrical and asymmetrical mesfets
JP3075831B2 (ja) * 1991-08-20 2000-08-14 三洋電機株式会社 電界効果型トランジスタ及びその製造方法
US5432103A (en) * 1992-06-22 1995-07-11 National Semiconductor Corporation Method of making semiconductor ROM cell programmed using source mask
JPH06283553A (ja) * 1993-03-30 1994-10-07 Mitsubishi Electric Corp 電界効果トランジスタ、及びその製造方法
US5633177A (en) * 1993-11-08 1997-05-27 Advanced Micro Devices, Inc. Method for producing a semiconductor gate conductor having an impurity migration barrier
US5536959A (en) * 1994-09-09 1996-07-16 Mcnc Self-aligned charge screen (SACS) field effect transistors and methods
JP2787908B2 (ja) * 1995-12-25 1998-08-20 日本電気株式会社 半導体装置の製造方法
JPH10322147A (ja) * 1996-10-04 1998-12-04 Toshiba Corp 高周波電力増幅器およびこれを用いた移動体通信装置
US6040214A (en) * 1998-02-19 2000-03-21 International Business Machines Corporation Method for making field effect transistors having sub-lithographic gates with vertical side walls
US6340826B1 (en) * 1998-03-30 2002-01-22 Agisilaos Iliadis Infra-red light emitting Si-MOSFET
FR2794898B1 (fr) * 1999-06-11 2001-09-14 France Telecom Dispositif semi-conducteur a tension de seuil compensee et procede de fabrication
US6258679B1 (en) 1999-12-20 2001-07-10 International Business Machines Corporation Sacrificial silicon sidewall for damascene gate formation
US6515350B1 (en) * 2000-02-22 2003-02-04 Micron Technology, Inc. Protective conformal silicon nitride films and spacers
JP2002076332A (ja) * 2000-08-24 2002-03-15 Hitachi Ltd 絶縁ゲート型電界効果トランジスタ及びその製造方法
US7217977B2 (en) * 2004-04-19 2007-05-15 Hrl Laboratories, Llc Covert transformation of transistor properties as a circuit protection method
US6815816B1 (en) * 2000-10-25 2004-11-09 Hrl Laboratories, Llc Implanted hidden interconnections in a semiconductor device for preventing reverse engineering
US6649460B2 (en) 2001-10-25 2003-11-18 International Business Machines Corporation Fabricating a substantially self-aligned MOSFET
US7049667B2 (en) 2002-09-27 2006-05-23 Hrl Laboratories, Llc Conductive channel pseudo block process and circuit to inhibit reverse engineering
US6979606B2 (en) * 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
JP4846239B2 (ja) * 2002-12-13 2011-12-28 エイチアールエル ラボラトリーズ，エルエルシー ウェル注入を用いた集積回路の改変
US6924180B2 (en) * 2003-02-10 2005-08-02 Chartered Semiconductor Manufacturing Ltd. Method of forming a pocket implant region after formation of composite insulator spacers
US6913980B2 (en) * 2003-06-30 2005-07-05 Texas Instruments Incorporated Process method of source drain spacer engineering to improve transistor capacitance
US7109099B2 (en) * 2003-10-17 2006-09-19 Chartered Semiconductor Manufacturing Ltd. End of range (EOR) secondary defect engineering using substitutional carbon doping
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
US7169675B2 (en) * 2004-07-07 2007-01-30 Chartered Semiconductor Manufacturing, Ltd Material architecture for the fabrication of low temperature transistor
US8168487B2 (en) 2006-09-28 2012-05-01 Hrl Laboratories, Llc Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer
US20090090980A1 (en) * 2007-10-08 2009-04-09 Mingchu King Asymmetric-ldd mos device
WO2015176002A1 (en) * 2014-05-15 2015-11-19 The Regents Of The University Of California Doping in iii-nitride devices
US11018255B2 (en) * 2017-08-29 2021-05-25 Micron Technology, Inc. Devices and systems with string drivers including high band gap material and methods of formation
US10790391B2 (en) 2018-06-27 2020-09-29 Taiwan Semiconductor Manufacturing Co., Ltd. Source/drain epitaxial layer profile

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Publication number Priority date Publication date Assignee Title
GB1507091A (en) * 1974-03-29 1978-04-12 Siemens Ag Schottky-gate field-effect transistors
JPS5833716B2 (ja) * 1975-12-03 1983-07-21 三洋電機株式会社 シヨツトキ−シヨウヘキガタデンカイコウカトランジスタノ セイゾウホウホウ
JPS54147789A (en) * 1978-05-11 1979-11-19 Matsushita Electric Ind Co Ltd Semiconductor divice and its manufacture
DE2821975C2 (de) * 1978-05-19 1983-01-27 Siemens AG, 1000 Berlin und 8000 München Metall-Halbleiter-Feldeffekttransistor (MESFET) und Verfahren zu dessen Herstellung
US4304042A (en) * 1978-11-13 1981-12-08 Xerox Corporation Self-aligned MESFETs having reduced series resistance
JPS5646562A (en) * 1979-09-25 1981-04-27 Sony Corp Semiconductor device
US4366613A (en) * 1980-12-17 1983-01-04 Ibm Corporation Method of fabricating an MOS dynamic RAM with lightly doped drain
US4389768A (en) * 1981-04-17 1983-06-28 International Business Machines Corporation Self-aligned process for fabricating gallium arsenide metal-semiconductor field effect transistors
US4396437A (en) * 1981-05-04 1983-08-02 Hughes Aircraft Company Selective encapsulation, controlled atmosphere annealing for III-V semiconductor device fabrication
EP0071335B1 (de) * 1981-07-27 1986-10-15 Xerox Corporation Feldeffekttransistor
US4553316A (en) * 1981-12-24 1985-11-19 Texas Instruments Incorporated Self-aligned gate method for making MESFET semiconductor
JPS59147464A (ja) * 1983-02-10 1984-08-23 Nec Corp 電界効果トランジスタ
JP2641189B2 (ja) * 1984-04-26 1997-08-13 日本電気株式会社 電界効果型トランジスタ
EP0181091B1 (de) * 1984-11-02 1990-06-13 Kabushiki Kaisha Toshiba Feldeffekttransistor mit einem Schottky-Gate und Herstellungsverfahren dafür

Also Published As

Publication number Publication date
EP0175864A2 (de) 1986-04-02
EP0175864B1 (de) 1989-05-24
EP0175864A3 (en) 1986-12-03
US4636822A (en) 1987-01-13
JPH0328059B2 (de) 1991-04-17
JPS6155973A (ja) 1986-03-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee