DE3482827D1 - Prozessor. - Google Patents

Prozessor.

Info

Publication number
DE3482827D1
DE3482827D1 DE8484114743T DE3482827T DE3482827D1 DE 3482827 D1 DE3482827 D1 DE 3482827D1 DE 8484114743 T DE8484114743 T DE 8484114743T DE 3482827 T DE3482827 T DE 3482827T DE 3482827 D1 DE3482827 D1 DE 3482827D1
Authority
DE
Germany
Prior art keywords
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8484114743T
Other languages
English (en)
Inventor
Koji C O Nec Corporation Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3482827D1 publication Critical patent/DE3482827D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3889Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824Operand accessing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
DE8484114743T 1983-12-05 1984-12-04 Prozessor. Expired - Fee Related DE3482827D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58229520A JPS60120439A (ja) 1983-12-05 1983-12-05 演算処理装置

Publications (1)

Publication Number Publication Date
DE3482827D1 true DE3482827D1 (de) 1990-08-30

Family

ID=16893454

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484114743T Expired - Fee Related DE3482827D1 (de) 1983-12-05 1984-12-04 Prozessor.

Country Status (4)

Country Link
US (1) US4644466A (de)
EP (1) EP0147684B1 (de)
JP (1) JPS60120439A (de)
DE (1) DE3482827D1 (de)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU553416B2 (en) * 1984-02-24 1986-07-17 Fujitsu Limited Pipeline processing
JPH0769818B2 (ja) * 1984-10-31 1995-07-31 株式会社日立製作所 デ−タ処理装置
EP0205193B1 (de) * 1985-06-17 1996-10-23 Nec Corporation Informationsverarbeitungssystem mit einer Steuerschaltung zum Abwarten einer Registererneuerung und einem Aufnahmemittel des zu erneuernden Registers
JPS62226231A (ja) * 1986-03-27 1987-10-05 Toshiba Corp プロセツサ
US4888689A (en) * 1986-10-17 1989-12-19 Amdahl Corporation Apparatus and method for improving cache access throughput in pipelined processors
JPS63195776A (ja) * 1987-02-07 1988-08-12 Olympus Optical Co Ltd 信号処理方式
JPH081599B2 (ja) * 1988-02-24 1996-01-10 三菱電機株式会社 データ処理装置
JPH0769806B2 (ja) * 1988-10-14 1995-07-31 三菱電機株式会社 データ処理装置
JP2810068B2 (ja) * 1988-11-11 1998-10-15 株式会社日立製作所 プロセッサシステム、コンピュータシステム及び命令処理方法
EP0407911B1 (de) * 1989-07-07 1998-12-09 Hitachi, Ltd. Vorrichtung und Verfahren zur parallelen Verarbeitung
JP2669158B2 (ja) * 1991-01-22 1997-10-27 三菱電機株式会社 データ処理装置
US5493687A (en) 1991-07-08 1996-02-20 Seiko Epson Corporation RISC microprocessor architecture implementing multiple typed register sets
US5539911A (en) 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
DE69311330T2 (de) * 1992-03-31 1997-09-25 Seiko Epson Corp., Tokio/Tokyo Befehlsablauffolgeplanung von einem risc-superskalarprozessor
EP0638183B1 (de) 1992-05-01 1997-03-05 Seiko Epson Corporation Vorrichtung und verfahren zum befehlsabschluss in einem superskalaren prozessor.
WO1994016384A1 (en) 1992-12-31 1994-07-21 Seiko Epson Corporation System and method for register renaming
US5628021A (en) * 1992-12-31 1997-05-06 Seiko Epson Corporation System and method for assigning tags to control instruction processing in a superscalar processor
US5787026A (en) * 1995-12-20 1998-07-28 Intel Corporation Method and apparatus for providing memory access in a processor pipeline
US6115730A (en) * 1996-02-28 2000-09-05 Via-Cyrix, Inc. Reloadable floating point unit
GB9707861D0 (en) * 1997-04-18 1997-06-04 Certicom Corp Arithmetic processor
US6298367B1 (en) 1998-04-06 2001-10-02 Advanced Micro Devices, Inc. Floating point addition pipeline including extreme value, comparison and accumulate functions
US6571268B1 (en) * 1998-10-06 2003-05-27 Texas Instruments Incorporated Multiplier accumulator circuits
US7139899B2 (en) * 1999-09-03 2006-11-21 Cisco Technology, Inc. Selected register decode values for pipeline stage register addressing
US6633971B2 (en) * 1999-10-01 2003-10-14 Hitachi, Ltd. Mechanism for forward data in a processor pipeline using a single pipefile connected to the pipeline
US6651176B1 (en) * 1999-12-08 2003-11-18 Hewlett-Packard Development Company, L.P. Systems and methods for variable control of power dissipation in a pipelined processor
TW200506733A (en) * 2003-08-15 2005-02-16 Via Tech Inc Apparatus and method for the co-simulation of CPU and DUT modules
US20060168393A1 (en) * 2005-01-27 2006-07-27 Christensen Bjorn P Apparatus and method for dependency tracking and register file bypass controls using a scannable register file
DE102010045800A1 (de) * 2010-09-20 2012-03-22 Texas Instruments Deutschland Gmbh Elektronische Vorrichtung und Verfahren zur Datenverarbeitung unter Verwendung einer Betriebsart mit virtuellem Register
JP6926727B2 (ja) * 2017-06-28 2021-08-25 富士通株式会社 演算処理装置および演算処理装置の制御方法
CN109840140A (zh) * 2017-11-28 2019-06-04 北京比特大陆科技有限公司 一种运算系统及相应的电子设备
EP3767481A1 (de) 2019-07-19 2021-01-20 PLS Patent-, Lizenz- und Schutzrechte Verwertung GmbH Prozessor

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1506972A (en) * 1976-02-06 1978-04-12 Int Computers Ltd Data processing systems
JPS5441641A (en) * 1977-09-09 1979-04-03 Hitachi Ltd Data processing system having data producing unit
JPS5466048A (en) * 1977-11-07 1979-05-28 Hitachi Ltd Information processor
CA1174370A (en) * 1980-05-19 1984-09-11 Hidekazu Matsumoto Data processing unit with pipelined operands
JPS6028015B2 (ja) * 1980-08-28 1985-07-02 日本電気株式会社 情報処理装置
JPS58149541A (ja) * 1982-03-01 1983-09-05 Hitachi Ltd デ−タ処理装置
JPS58149542A (ja) * 1982-03-01 1983-09-05 Hitachi Ltd デ−タ処理装置
JPS592143A (ja) * 1982-06-29 1984-01-07 Hitachi Ltd 情報処理装置
JPS59177655A (ja) * 1983-03-29 1984-10-08 Fujitsu Ltd 演算バイパス制御方式

Also Published As

Publication number Publication date
EP0147684B1 (de) 1990-07-25
US4644466A (en) 1987-02-17
EP0147684A3 (en) 1988-02-10
EP0147684A2 (de) 1985-07-10
JPS60120439A (ja) 1985-06-27
JPS6215891B2 (de) 1987-04-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee