DE3476492D1 - Reduced pressure epitaxial deposition process - Google Patents

Reduced pressure epitaxial deposition process

Info

Publication number
DE3476492D1
DE3476492D1 DE8484110058T DE3476492T DE3476492D1 DE 3476492 D1 DE3476492 D1 DE 3476492D1 DE 8484110058 T DE8484110058 T DE 8484110058T DE 3476492 T DE3476492 T DE 3476492T DE 3476492 D1 DE3476492 D1 DE 3476492D1
Authority
DE
Germany
Prior art keywords
reduced pressure
deposition process
epitaxial deposition
pressure epitaxial
reduced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8484110058T
Other languages
German (de)
English (en)
Inventor
Arun Kumar Gaind
Subhash Balkrishna Kulkarni
Michael Robert Poponiak
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3476492D1 publication Critical patent/DE3476492D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/2205—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/916—Autodoping control or utilization

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Bipolar Transistors (AREA)
DE8484110058T 1983-10-19 1984-08-23 Reduced pressure epitaxial deposition process Expired DE3476492D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/543,555 US4504330A (en) 1983-10-19 1983-10-19 Optimum reduced pressure epitaxial growth process to prevent autodoping

Publications (1)

Publication Number Publication Date
DE3476492D1 true DE3476492D1 (en) 1989-03-02

Family

ID=24168529

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484110058T Expired DE3476492D1 (en) 1983-10-19 1984-08-23 Reduced pressure epitaxial deposition process

Country Status (4)

Country Link
US (1) US4504330A (OSRAM)
EP (1) EP0139990B1 (OSRAM)
JP (1) JPS60101928A (OSRAM)
DE (1) DE3476492D1 (OSRAM)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63185061A (ja) * 1987-01-28 1988-07-30 Toshiba Corp 半導体装置の製造方法
JPH01161826A (ja) * 1987-12-18 1989-06-26 Toshiba Corp 気相エピタキシャル成長法
FR2766845B1 (fr) * 1997-07-31 1999-10-15 Sgs Thomson Microelectronics Procede d'epitaxie sur un substrat de silicium comprenant des zones fortement dopees a l'arsenic
US6612240B1 (en) 2000-09-15 2003-09-02 Silverbrook Research Pty Ltd Drying of an image on print media in a modular commercial printer

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3669769A (en) * 1970-09-29 1972-06-13 Ibm Method for minimizing autodoping in epitaxial deposition
US3765960A (en) * 1970-11-02 1973-10-16 Ibm Method for minimizing autodoping in epitaxial deposition
US4153486A (en) * 1978-06-05 1979-05-08 International Business Machines Corporation Silicon tetrachloride epitaxial process for producing very sharp autodoping profiles and very low defect densities on substrates with high concentration buried impurity layers utilizing a preheating in hydrogen
US4263336A (en) * 1979-11-23 1981-04-21 Motorola, Inc. Reduced pressure induction heated reactor and method

Also Published As

Publication number Publication date
JPH0526326B2 (OSRAM) 1993-04-15
JPS60101928A (ja) 1985-06-06
US4504330A (en) 1985-03-12
EP0139990A2 (en) 1985-05-08
EP0139990B1 (en) 1989-01-25
EP0139990A3 (en) 1985-08-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee