DE3407784A1 - Duennschichthybridschaltung - Google Patents

Duennschichthybridschaltung

Info

Publication number
DE3407784A1
DE3407784A1 DE19843407784 DE3407784A DE3407784A1 DE 3407784 A1 DE3407784 A1 DE 3407784A1 DE 19843407784 DE19843407784 DE 19843407784 DE 3407784 A DE3407784 A DE 3407784A DE 3407784 A1 DE3407784 A1 DE 3407784A1
Authority
DE
Germany
Prior art keywords
layer
thin
contact surfaces
hybrid circuit
inorganic protective
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19843407784
Other languages
German (de)
English (en)
Other versions
DE3407784C2 (enExample
Inventor
Dieter Dipl.-Ing. 6840 Lampertheim Gilbers
Hans-Joachim Dipl.-Phys. Dr. 6907 Nußloch Krokoszinski
Henning Dipl.-Phys. Dr. 6901 Mauer Oetzmann
Conrad Dipl.-Phys. Dr. 6901 Gaiberg Schmidt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ABB AG Germany
Original Assignee
BBC Brown Boveri AG Germany
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BBC Brown Boveri AG Germany filed Critical BBC Brown Boveri AG Germany
Priority to DE19843407784 priority Critical patent/DE3407784A1/de
Priority to EP85101472A priority patent/EP0153650B1/de
Priority to JP60040973A priority patent/JPS60206192A/ja
Publication of DE3407784A1 publication Critical patent/DE3407784A1/de
Application granted granted Critical
Publication of DE3407784C2 publication Critical patent/DE3407784C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H10W74/137—
    • H10W74/147—
    • H10W74/43—
    • H10W90/00—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/017—Glass ceramic coating, e.g. formed on inorganic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0302—Properties and characteristics in general
    • H05K2201/0317—Thin film conductor layer; Thin film passive component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0585—Second resist used as mask for selective stripping of first resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0756—Uses of liquids, e.g. rinsing, coating, dissolving
    • H05K2203/0759—Forming a polymer layer by liquid coating, e.g. a non-metallic protective coating or an organic bonding layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/002—Etching of the substrate by chemical or physical means by liquid chemical etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Formation Of Insulating Films (AREA)
DE19843407784 1984-03-02 1984-03-02 Duennschichthybridschaltung Granted DE3407784A1 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE19843407784 DE3407784A1 (de) 1984-03-02 1984-03-02 Duennschichthybridschaltung
EP85101472A EP0153650B1 (de) 1984-03-02 1985-02-12 Dünnschichthybridschaltung
JP60040973A JPS60206192A (ja) 1984-03-02 1985-03-01 薄膜ハイブリツド回路およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19843407784 DE3407784A1 (de) 1984-03-02 1984-03-02 Duennschichthybridschaltung

Publications (2)

Publication Number Publication Date
DE3407784A1 true DE3407784A1 (de) 1985-09-12
DE3407784C2 DE3407784C2 (enExample) 1988-11-10

Family

ID=6229455

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19843407784 Granted DE3407784A1 (de) 1984-03-02 1984-03-02 Duennschichthybridschaltung

Country Status (3)

Country Link
EP (1) EP0153650B1 (enExample)
JP (1) JPS60206192A (enExample)
DE (1) DE3407784A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3735959A1 (de) * 1987-10-23 1989-05-03 Bbc Brown Boveri & Cie Mehrlagige duennschichtschaltung sowie verfahren zu deren herstellung
US6919264B2 (en) 2002-09-05 2005-07-19 Infineon Technologies Ag Method for the solder-stop structuring of elevations on wafers

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0340486A (ja) * 1989-07-07 1991-02-21 Asahi Chem Ind Co Ltd 印刷配線基板
RU2133523C1 (ru) * 1997-11-03 1999-07-20 Закрытое акционерное общество "Техно-ТМ" Трехмерный электронный модуль
DE10320561B4 (de) * 2003-05-07 2007-12-06 Qimonda Ag Verfahren zur Herstellung einer leitfähigen Verbindung zwischen einem Halbleiterchip und einer äußeren Leiterstruktur
JP4652179B2 (ja) 2005-09-05 2011-03-16 日東電工株式会社 配線回路基板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1925921A1 (de) * 1968-06-04 1970-03-19 Bendix Corp Verfahren zur Herstellung von Filmschichtwiderstaenden auf Isolierkoerpern
DE2402720A1 (de) * 1973-01-22 1974-08-22 Hitachi Ltd Isolierverfahren fuer elektrische schaltungs-leitungszuege
US4001870A (en) * 1972-08-18 1977-01-04 Hitachi, Ltd. Isolating protective film for semiconductor devices and method for making the same
DE2719045A1 (de) * 1976-04-30 1977-11-10 Nippon Kogaku Kk Filmwiderstand und verfahren zu seiner herstellung
DE2823881A1 (de) * 1978-05-31 1979-12-06 Siemens Ag Leiterbahnueberkreuzungen fuer integrierte rc-netzwerke

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2548060C2 (de) * 1975-10-27 1984-06-20 Siemens AG, 1000 Berlin und 8000 München Halbleitervorrichtung und Verfahren zu ihrer Herstellung
US4275407A (en) * 1977-09-01 1981-06-23 Honeywell Inc. Durable insulating protective layer for hybrid CCD/mosaic IR detector array
GB2046024B (en) * 1979-03-30 1983-01-26 Ferranti Ltd Circuit assembly

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1925921A1 (de) * 1968-06-04 1970-03-19 Bendix Corp Verfahren zur Herstellung von Filmschichtwiderstaenden auf Isolierkoerpern
US4001870A (en) * 1972-08-18 1977-01-04 Hitachi, Ltd. Isolating protective film for semiconductor devices and method for making the same
DE2402720A1 (de) * 1973-01-22 1974-08-22 Hitachi Ltd Isolierverfahren fuer elektrische schaltungs-leitungszuege
DE2719045A1 (de) * 1976-04-30 1977-11-10 Nippon Kogaku Kk Filmwiderstand und verfahren zu seiner herstellung
DE2823881A1 (de) * 1978-05-31 1979-12-06 Siemens Ag Leiterbahnueberkreuzungen fuer integrierte rc-netzwerke

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3735959A1 (de) * 1987-10-23 1989-05-03 Bbc Brown Boveri & Cie Mehrlagige duennschichtschaltung sowie verfahren zu deren herstellung
US6919264B2 (en) 2002-09-05 2005-07-19 Infineon Technologies Ag Method for the solder-stop structuring of elevations on wafers

Also Published As

Publication number Publication date
EP0153650B1 (de) 1989-11-08
EP0153650A2 (de) 1985-09-04
DE3407784C2 (enExample) 1988-11-10
JPS60206192A (ja) 1985-10-17
EP0153650A3 (en) 1986-11-05

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8127 New person/name/address of the applicant

Owner name: BBC BROWN BOVERI AG, 6800 MANNHEIM, DE

D2 Grant after examination
8327 Change in the person/name/address of the patent owner

Owner name: ASEA BROWN BOVERI AG, 6800 MANNHEIM, DE

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee