DE3380836D1 - Method of manufacturing a semiconductor device including a mis field effect transistor - Google Patents

Method of manufacturing a semiconductor device including a mis field effect transistor

Info

Publication number
DE3380836D1
DE3380836D1 DE8383304843T DE3380836T DE3380836D1 DE 3380836 D1 DE3380836 D1 DE 3380836D1 DE 8383304843 T DE8383304843 T DE 8383304843T DE 3380836 T DE3380836 T DE 3380836T DE 3380836 D1 DE3380836 D1 DE 3380836D1
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
field effect
device including
effect transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383304843T
Other languages
English (en)
Inventor
Katsuhiro Kawabuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3380836D1 publication Critical patent/DE3380836D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE8383304843T 1982-08-25 1983-08-22 Method of manufacturing a semiconductor device including a mis field effect transistor Expired DE3380836D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57147055A JPS5941870A (ja) 1982-08-25 1982-08-25 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
DE3380836D1 true DE3380836D1 (en) 1989-12-14

Family

ID=15421474

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383304843T Expired DE3380836D1 (en) 1982-08-25 1983-08-22 Method of manufacturing a semiconductor device including a mis field effect transistor

Country Status (4)

Country Link
US (1) US4514233A (de)
EP (1) EP0106458B1 (de)
JP (1) JPS5941870A (de)
DE (1) DE3380836D1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4985373A (en) * 1982-04-23 1991-01-15 At&T Bell Laboratories Multiple insulating layer for two-level interconnected metallization in semiconductor integrated circuit structures
JPS61145868A (ja) * 1984-12-20 1986-07-03 Toshiba Corp 半導体装置の製造方法
GB2172427A (en) * 1985-03-13 1986-09-17 Philips Electronic Associated Semiconductor device manufacture using a deflected ion beam
FR2582445B1 (fr) * 1985-05-21 1988-04-08 Efcis Procede de fabrication de transistors mos a electrodes de siliciure metallique
US4972251A (en) * 1985-08-14 1990-11-20 Fairchild Camera And Instrument Corp. Multilayer glass passivation structure and method for forming the same
US4654121A (en) * 1986-02-27 1987-03-31 Ncr Corporation Fabrication process for aligned and stacked CMOS devices
US4826782A (en) * 1987-04-17 1989-05-02 Tektronix, Inc. Method of fabricating aLDD field-effect transistor
JPS63268258A (ja) * 1987-04-24 1988-11-04 Nec Corp 半導体装置
US4755478A (en) * 1987-08-13 1988-07-05 International Business Machines Corporation Method of forming metal-strapped polysilicon gate electrode for FET device
JPH0787195B2 (ja) * 1987-10-22 1995-09-20 三菱電機株式会社 ショットキゲート電界効果トランジスタの製造方法
US5171718A (en) * 1987-11-27 1992-12-15 Sony Corporation Method for forming a fine pattern by using a patterned resist layer
US4908332A (en) * 1989-05-04 1990-03-13 Industrial Technology Research Institute Process for making metal-polysilicon double-layered gate
US5378650A (en) * 1990-10-12 1995-01-03 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and a manufacturing method thereof
US5885879A (en) * 1997-03-21 1999-03-23 Advanced Micro Devices, Inc. Thin polysilicon masking technique for improved lithography control
US5930634A (en) * 1997-04-21 1999-07-27 Advanced Micro Devices, Inc. Method of making an IGFET with a multilevel gate
US6074921A (en) * 1997-06-30 2000-06-13 Vlsi Technology, Inc. Self-aligned processing of semiconductor device features
US5953612A (en) * 1997-06-30 1999-09-14 Vlsi Technology, Inc. Self-aligned silicidation technique to independently form silicides of different thickness on a semiconductor device
US6207543B1 (en) 1997-06-30 2001-03-27 Vlsi Technology, Inc. Metallization technique for gate electrodes and local interconnects
US6143613A (en) * 1997-06-30 2000-11-07 Vlsi Technology, Inc. Selective exclusion of silicide formation to make polysilicon resistors
US6194299B1 (en) * 1999-06-03 2001-02-27 Advanced Micro Devices, Inc. Method for fabrication of a low resistivity MOSFET gate with thick metal on polysilicon
CN109817586A (zh) * 2018-12-25 2019-05-28 厦门市三安集成电路有限公司 高温退火时保护功率器件金属接触的方法和金属接触结构

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1522755A (en) * 1975-07-25 1978-08-31 Ncr Co Method of manufacturing a semiconductor device
JPS5235983A (en) * 1975-09-17 1977-03-18 Hitachi Ltd Manufacturing method of field effective transistor
IT1089298B (it) * 1977-01-17 1985-06-18 Mostek Corp Procedimento per fabbricare un dispositivo semiconduttore
JPS53144687A (en) * 1977-05-23 1978-12-16 Matsushita Electric Ind Co Ltd Production of semiconductor device
US4141022A (en) * 1977-09-12 1979-02-20 Signetics Corporation Refractory metal contacts for IGFETS
US4149307A (en) * 1977-12-28 1979-04-17 Hughes Aircraft Company Process for fabricating insulated-gate field-effect transistors with self-aligned contacts
US4282647A (en) * 1978-04-04 1981-08-11 Standard Microsystems Corporation Method of fabricating high density refractory metal gate MOS integrated circuits utilizing the gate as a selective diffusion and oxidation mask
JPS5561037A (en) * 1978-10-31 1980-05-08 Toshiba Corp Preparation of semiconductor device
JPS55112853U (de) * 1979-02-02 1980-08-08
JPS55125649A (en) * 1979-03-22 1980-09-27 Nec Corp Production of semiconductor integrated circuit
JPS55125651A (en) * 1979-03-22 1980-09-27 Nec Corp Production of semiconductor integrated circuit
FR2461360A1 (fr) * 1979-07-10 1981-01-30 Thomson Csf Procede de fabrication d'un transistor a effet de champ du type dmos a fonctionnement vertical et transistor obtenu par ce procede
JPS5642372A (en) * 1979-09-12 1981-04-20 Toshiba Corp Manufacture of semiconductor device
JPS5658247A (en) * 1979-10-17 1981-05-21 Fujitsu Ltd Production of semiconductor device
US4343082A (en) * 1980-04-17 1982-08-10 Bell Telephone Laboratories, Incorporated Method of making contact electrodes to silicon gate, and source and drain regions, of a semiconductor device
US4400867A (en) * 1982-04-26 1983-08-30 Bell Telephone Laboratories, Incorporated High conductivity metallization for semiconductor integrated circuits

Also Published As

Publication number Publication date
US4514233A (en) 1985-04-30
JPH0576177B2 (de) 1993-10-22
EP0106458A2 (de) 1984-04-25
JPS5941870A (ja) 1984-03-08
EP0106458B1 (de) 1989-11-08
EP0106458A3 (en) 1986-07-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee