DE3379929D1 - Method of forming fusible links in a semiconductor device - Google Patents
Method of forming fusible links in a semiconductor deviceInfo
- Publication number
- DE3379929D1 DE3379929D1 DE8383301490T DE3379929T DE3379929D1 DE 3379929 D1 DE3379929 D1 DE 3379929D1 DE 8383301490 T DE8383301490 T DE 8383301490T DE 3379929 T DE3379929 T DE 3379929T DE 3379929 D1 DE3379929 D1 DE 3379929D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- fusible links
- forming fusible
- forming
- links
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
- H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57043746A JPS6044829B2 (ja) | 1982-03-18 | 1982-03-18 | 半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3379929D1 true DE3379929D1 (en) | 1989-06-29 |
Family
ID=12672319
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8383301490T Expired DE3379929D1 (en) | 1982-03-18 | 1983-03-17 | Method of forming fusible links in a semiconductor device |
Country Status (4)
Country | Link |
---|---|
US (1) | US4455194A (de) |
EP (1) | EP0089814B1 (de) |
JP (1) | JPS6044829B2 (de) |
DE (1) | DE3379929D1 (de) |
Families Citing this family (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4562639A (en) * | 1982-03-23 | 1986-01-07 | Texas Instruments Incorporated | Process for making avalanche fuse element with isolated emitter |
JPS59214239A (ja) * | 1983-05-16 | 1984-12-04 | Fujitsu Ltd | 半導体装置の製造方法 |
JPS6098665A (ja) * | 1983-11-02 | 1985-06-01 | Mitsubishi Electric Corp | 半導体メモリ装置 |
US4717449A (en) * | 1984-04-25 | 1988-01-05 | Honeywell Inc. | Dielectric barrier material |
JPS6122650A (ja) * | 1984-07-11 | 1986-01-31 | Hitachi Ltd | 欠陥救済方法および装置 |
US4751197A (en) * | 1984-07-18 | 1988-06-14 | Texas Instruments Incorporated | Make-link programming of semiconductor devices using laser enhanced thermal breakdown of insulator |
US4924287A (en) * | 1985-01-20 | 1990-05-08 | Avner Pdahtzur | Personalizable CMOS gate array device and technique |
US4635345A (en) * | 1985-03-14 | 1987-01-13 | Harris Corporation | Method of making an intergrated vertical NPN and vertical oxide fuse programmable memory cell |
US4701780A (en) * | 1985-03-14 | 1987-10-20 | Harris Corporation | Integrated verticle NPN and vertical oxide fuse programmable memory cell |
US4642162A (en) * | 1986-01-02 | 1987-02-10 | Honeywell Inc. | Planarization of dielectric layers in integrated circuits |
US4707457A (en) * | 1986-04-03 | 1987-11-17 | Advanced Micro Devices, Inc. | Method for making improved contact for integrated circuit structure |
US4732658A (en) * | 1986-12-03 | 1988-03-22 | Honeywell Inc. | Planarization of silicon semiconductor devices |
IL81849A0 (en) * | 1987-03-10 | 1987-10-20 | Zvi Orbach | Integrated circuits and a method for manufacture thereof |
IL82113A (en) * | 1987-04-05 | 1992-08-18 | Zvi Orbach | Fabrication of customized integrated circuits |
US5017510A (en) * | 1987-06-01 | 1991-05-21 | Texas Instruments Incorporated | Method of making a scalable fuse link element |
US4862243A (en) * | 1987-06-01 | 1989-08-29 | Texas Instruments Incorporated | Scalable fuse link element |
US4853758A (en) * | 1987-08-12 | 1989-08-01 | American Telephone And Telegraph Company, At&T Bell Laboratories | Laser-blown links |
US5011791A (en) * | 1989-02-03 | 1991-04-30 | Motorola, Inc. | Fusible link with built-in redundancy |
US5010039A (en) * | 1989-05-15 | 1991-04-23 | Ku San Mei | Method of forming contacts to a semiconductor device |
US5025300A (en) * | 1989-06-30 | 1991-06-18 | At&T Bell Laboratories | Integrated circuits having improved fusible links |
US5066998A (en) * | 1989-06-30 | 1991-11-19 | At&T Bell Laboratories | Severable conductive path in an integrated-circuit device |
JP2816394B2 (ja) * | 1989-10-24 | 1998-10-27 | セイコークロック株式会社 | 半導体装置 |
US5241212A (en) * | 1990-05-01 | 1993-08-31 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having a redundant circuit portion and a manufacturing method of the same |
US5780918A (en) * | 1990-05-22 | 1998-07-14 | Seiko Epson Corporation | Semiconductor integrated circuit device having a programmable adjusting element in the form of a fuse mounted on a margin of the device and a method of manufacturing the same |
US5326709A (en) * | 1991-12-19 | 1994-07-05 | Samsung Electronics Co., Ltd. | Wafer testing process of a semiconductor device comprising a redundancy circuit |
JPH05235170A (ja) * | 1992-02-24 | 1993-09-10 | Nec Corp | 半導体装置 |
JPH0737988A (ja) * | 1993-07-20 | 1995-02-07 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
US5521116A (en) * | 1995-04-24 | 1996-05-28 | Texas Instruments Incorporated | Sidewall formation process for a top lead fuse |
US5729042A (en) * | 1995-08-14 | 1998-03-17 | Vanguard International Semiconductor Corporation | Raised fuse structure for laser repair |
EP0762498A3 (de) * | 1995-08-28 | 1998-06-24 | International Business Machines Corporation | Fenster für Sicherung mit kontrollierter Sicherungsoxiddicke |
US5538924A (en) * | 1995-09-05 | 1996-07-23 | Vanguard International Semiconductor Co. | Method of forming a moisture guard ring for integrated circuit applications |
JP3402029B2 (ja) * | 1995-11-30 | 2003-04-28 | 三菱電機株式会社 | 半導体装置の製造方法 |
US5895262A (en) * | 1996-01-31 | 1999-04-20 | Micron Technology, Inc. | Methods for etching fuse openings in a semiconductor device |
US5986319A (en) | 1997-03-19 | 1999-11-16 | Clear Logic, Inc. | Laser fuse and antifuse structures formed over the active circuitry of an integrated circuit |
TW412845B (en) | 1997-10-13 | 2000-11-21 | Fujitsu Ltd | Semiconductor device having a fuse and a fabrication process thereof |
KR100265596B1 (ko) | 1997-10-27 | 2000-10-02 | 김영환 | 반도체 소자의 제조방법 |
JPH11195711A (ja) * | 1997-10-27 | 1999-07-21 | Seiko Epson Corp | 半導体装置およびその製造方法 |
JPH11195753A (ja) | 1997-10-27 | 1999-07-21 | Seiko Epson Corp | 半導体装置およびその製造方法 |
US6121074A (en) * | 1998-11-05 | 2000-09-19 | Siemens Aktiengesellschaft | Fuse layout for improved fuse blow process window |
US6235557B1 (en) | 1999-04-28 | 2001-05-22 | Philips Semiconductors, Inc. | Programmable fuse and method therefor |
US6335229B1 (en) * | 1999-10-13 | 2002-01-01 | International Business Machines Corporation | Inductive fuse for semiconductor device |
US6306746B1 (en) * | 1999-12-30 | 2001-10-23 | Koninklijke Philips Electronics | Backend process for fuse link opening |
US6559042B2 (en) * | 2001-06-28 | 2003-05-06 | International Business Machines Corporation | Process for forming fusible links |
US7098491B2 (en) * | 2003-12-30 | 2006-08-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Protection circuit located under fuse window |
US7238620B1 (en) | 2004-02-18 | 2007-07-03 | National Semiconductor Corporation | System and method for providing a uniform oxide layer over a laser trimmed fuse with a differential wet etch stop technique |
JP5981260B2 (ja) * | 2011-09-30 | 2016-08-31 | エスアイアイ・セミコンダクタ株式会社 | 半導体装置 |
US8946000B2 (en) * | 2013-02-22 | 2015-02-03 | Freescale Semiconductor, Inc. | Method for forming an integrated circuit having a programmable fuse |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4042950A (en) * | 1976-03-01 | 1977-08-16 | Advanced Micro Devices, Inc. | Platinum silicide fuse links for integrated circuit devices |
US4242698A (en) * | 1977-11-02 | 1980-12-30 | Texas Instruments Incorporated | Maximum density interconnections for large scale integrated circuits |
CA1120611A (en) * | 1978-12-29 | 1982-03-23 | Hormazdyar M. Dalal | Forming interconnections for multilevel interconnection metallurgy systems |
JPS5847596Y2 (ja) * | 1979-09-05 | 1983-10-29 | 富士通株式会社 | 半導体装置 |
US4420504A (en) * | 1980-12-22 | 1983-12-13 | Raytheon Company | Programmable read only memory |
-
1982
- 1982-03-18 JP JP57043746A patent/JPS6044829B2/ja not_active Expired
-
1983
- 1983-03-17 US US06/476,264 patent/US4455194A/en not_active Expired - Lifetime
- 1983-03-17 EP EP83301490A patent/EP0089814B1/de not_active Expired
- 1983-03-17 DE DE8383301490T patent/DE3379929D1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS6044829B2 (ja) | 1985-10-05 |
EP0089814A3 (en) | 1985-09-18 |
US4455194A (en) | 1984-06-19 |
EP0089814A2 (de) | 1983-09-28 |
JPS58161361A (ja) | 1983-09-24 |
EP0089814B1 (de) | 1989-05-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |