DE3378869D1 - A method of forming electrodes and wiring strips on a semiconductor device - Google Patents
A method of forming electrodes and wiring strips on a semiconductor deviceInfo
- Publication number
- DE3378869D1 DE3378869D1 DE8383101880T DE3378869T DE3378869D1 DE 3378869 D1 DE3378869 D1 DE 3378869D1 DE 8383101880 T DE8383101880 T DE 8383101880T DE 3378869 T DE3378869 T DE 3378869T DE 3378869 D1 DE3378869 D1 DE 3378869D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- forming electrodes
- wiring strips
- strips
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6653—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using the removal of at least part of spacer, e.g. disposable spacer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0338—Process specially adapted to improve the resolution of the mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41775—Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
- H01L29/41783—Raised source or drain electrodes self aligned with the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57041331A JPS58158972A (ja) | 1982-03-16 | 1982-03-16 | 半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3378869D1 true DE3378869D1 (en) | 1989-02-09 |
Family
ID=12605531
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8383101880T Expired DE3378869D1 (en) | 1982-03-16 | 1983-02-25 | A method of forming electrodes and wiring strips on a semiconductor device |
Country Status (4)
Country | Link |
---|---|
US (1) | US4521448A (de) |
EP (1) | EP0088922B1 (de) |
JP (1) | JPS58158972A (de) |
DE (1) | DE3378869D1 (de) |
Families Citing this family (39)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6074682A (ja) * | 1983-09-30 | 1985-04-26 | Toshiba Corp | 半導体装置の製造方法 |
EP0159601A3 (de) * | 1984-04-10 | 1987-08-19 | Hartwig Wolfgang Prof.Dr. Thim | Logik-Schaltungsanordnung mit dazu angepasst ausgebildeten Feldeffekt-Transistoren |
JPH0760864B2 (ja) * | 1984-07-13 | 1995-06-28 | 株式会社日立製作所 | 半導体集積回路装置 |
EP0173953B1 (de) * | 1984-08-28 | 1991-07-17 | Kabushiki Kaisha Toshiba | Verfahren zum Herstellen einer Halbleiteranordnung mit Gateelektrode |
JPS61135149A (ja) * | 1984-12-06 | 1986-06-23 | Toshiba Corp | Mos型集積回路 |
US5227319A (en) * | 1985-02-08 | 1993-07-13 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device |
JPS61287159A (ja) * | 1985-06-13 | 1986-12-17 | Oki Electric Ind Co Ltd | Bi−CMOS半導体IC装置の製造方法 |
US4760433A (en) * | 1986-01-31 | 1988-07-26 | Harris Corporation | ESD protection transistors |
US4895810A (en) * | 1986-03-21 | 1990-01-23 | Advanced Power Technology, Inc. | Iopographic pattern delineated power mosfet with profile tailored recessed source |
US5256583A (en) * | 1986-03-21 | 1993-10-26 | Advanced Power Technology, Inc. | Mask surrogate semiconductor process with polysilicon gate protection |
JPS62252891A (ja) * | 1986-04-25 | 1987-11-04 | Sumitomo Heavy Ind Ltd | 向流式浮動プレ−ト型熱交換器 |
US4794565A (en) * | 1986-09-15 | 1988-12-27 | The Regents Of The University Of California | Electrically programmable memory device employing source side injection |
US4786609A (en) * | 1987-10-05 | 1988-11-22 | North American Philips Corporation, Signetics Division | Method of fabricating field-effect transistor utilizing improved gate sidewall spacers |
JPH01173756A (ja) * | 1987-12-28 | 1989-07-10 | Toshiba Corp | 半導体装置の製造方法 |
GB2214349B (en) * | 1988-01-19 | 1991-06-26 | Standard Microsyst Smc | Process for fabricating mos devices |
JP2705106B2 (ja) * | 1988-05-25 | 1998-01-26 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
FR2634318B1 (fr) * | 1988-07-13 | 1992-02-21 | Commissariat Energie Atomique | Procede de fabrication d'une cellule de memoire integree |
US4948745A (en) * | 1989-05-22 | 1990-08-14 | Motorola, Inc. | Process for elevated source/drain field effect structure |
US5013675A (en) * | 1989-05-23 | 1991-05-07 | Advanced Micro Devices, Inc. | Method of forming and removing polysilicon lightly doped drain spacers |
US5212105A (en) * | 1989-05-24 | 1993-05-18 | Kabushiki Kaisha Toshiba | Semiconductor device manufacturing method and semiconductor device manufactured thereby |
JP2995838B2 (ja) * | 1990-01-11 | 1999-12-27 | セイコーエプソン株式会社 | Mis型半導体装置及びその製造方法 |
US5013398A (en) * | 1990-05-29 | 1991-05-07 | Micron Technology, Inc. | Anisotropic etch method for a sandwich structure |
US5496750A (en) * | 1994-09-19 | 1996-03-05 | Texas Instruments Incorporated | Elevated source/drain junction metal oxide semiconductor field-effect transistor using blanket silicon deposition |
US20020197838A1 (en) * | 1996-01-16 | 2002-12-26 | Sailesh Chittipeddi | Transistor fabrication method |
US6225174B1 (en) * | 1996-06-13 | 2001-05-01 | Micron Technology, Inc. | Method for forming a spacer using photosensitive material |
WO1999005728A1 (en) | 1997-07-25 | 1999-02-04 | Nichia Chemical Industries, Ltd. | Nitride semiconductor device |
US6063668A (en) * | 1997-12-18 | 2000-05-16 | Advanced Micro Devices, Inc. | Poly I spacer manufacturing process to eliminate polystringers in high density nand-type flash memory devices |
US6281078B1 (en) | 1997-12-18 | 2001-08-28 | Advanced Micro Devices, Inc. | Manufacturing process to eliminate ONO fence material in high density NAND-type flash memory devices |
US5994239A (en) * | 1997-12-18 | 1999-11-30 | Advanced Micro Devices, Inc. | Manufacturing process to eliminate polystringers in high density nand-type flash memory devices |
US6051487A (en) * | 1997-12-18 | 2000-04-18 | Advanced Micro Devices, Inc. | Semiconductor device fabrication using a sacrificial plug for defining a region for a gate electrode |
US6448615B1 (en) | 1998-02-26 | 2002-09-10 | Micron Technology, Inc. | Methods, structures, and circuits for transistors with gate-to-body capacitive coupling |
US6104066A (en) | 1998-03-30 | 2000-08-15 | Micron Technology, Inc. | Circuit and method for low voltage, voltage sense amplifier |
JP3770014B2 (ja) | 1999-02-09 | 2006-04-26 | 日亜化学工業株式会社 | 窒化物半導体素子 |
EP1168539B1 (de) | 1999-03-04 | 2009-12-16 | Nichia Corporation | Nitridhalbleiterlaserelement |
US6197673B1 (en) * | 1999-06-08 | 2001-03-06 | United Semiconductor Corp. | Method of fabricating passivation of gate electrode |
JP4468609B2 (ja) * | 2001-05-21 | 2010-05-26 | 株式会社ルネサステクノロジ | 半導体装置 |
TWI362769B (en) | 2008-05-09 | 2012-04-21 | Univ Nat Chiao Tung | Light emitting device and fabrication method therefor |
US9236243B2 (en) | 2014-01-09 | 2016-01-12 | Stmicroelectronics Pte Ltd | Method for making semiconductor devices including reactant treatment of residual surface portion |
US11063117B2 (en) * | 2017-04-20 | 2021-07-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device structure having carrier-trapping layers with different grain sizes |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4359816A (en) * | 1980-07-08 | 1982-11-23 | International Business Machines Corporation | Self-aligned metal process for field effect transistor integrated circuits |
US4354896A (en) * | 1980-08-05 | 1982-10-19 | Texas Instruments Incorporated | Formation of submicron substrate element |
-
1982
- 1982-03-16 JP JP57041331A patent/JPS58158972A/ja active Granted
-
1983
- 1983-02-25 EP EP83101880A patent/EP0088922B1/de not_active Expired
- 1983-02-25 DE DE8383101880T patent/DE3378869D1/de not_active Expired
- 1983-03-03 US US06/471,651 patent/US4521448A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US4521448A (en) | 1985-06-04 |
JPS58158972A (ja) | 1983-09-21 |
EP0088922A3 (en) | 1985-07-03 |
JPH0479133B2 (de) | 1992-12-15 |
EP0088922B1 (de) | 1989-01-04 |
EP0088922A2 (de) | 1983-09-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |