DE3276887D1 - Process for fabricating a semiconductor device having a phosphosilicate glass layer - Google Patents

Process for fabricating a semiconductor device having a phosphosilicate glass layer

Info

Publication number
DE3276887D1
DE3276887D1 DE8282305660T DE3276887T DE3276887D1 DE 3276887 D1 DE3276887 D1 DE 3276887D1 DE 8282305660 T DE8282305660 T DE 8282305660T DE 3276887 T DE3276887 T DE 3276887T DE 3276887 D1 DE3276887 D1 DE 3276887D1
Authority
DE
Germany
Prior art keywords
fabricating
semiconductor device
glass layer
phosphosilicate glass
phosphosilicate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282305660T
Other languages
German (de)
English (en)
Inventor
Takashi Okano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3276887D1 publication Critical patent/DE3276887D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/66—Wet etching of conductive or resistive materials
    • H10P50/663—Wet etching of conductive or resistive materials by chemical means only
    • H10P50/667—Wet etching of conductive or resistive materials by chemical means only by liquid etching only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/015—Manufacture or treatment of bond wires
    • H10W72/01571—Cleaning, e.g. oxide removal or de-smearing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07511—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers
    • H10W72/983—Reinforcing structures, e.g. collars
DE8282305660T 1981-10-23 1982-10-25 Process for fabricating a semiconductor device having a phosphosilicate glass layer Expired DE3276887D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56169766A JPS5871628A (ja) 1981-10-23 1981-10-23 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
DE3276887D1 true DE3276887D1 (en) 1987-09-03

Family

ID=15892450

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282305660T Expired DE3276887D1 (en) 1981-10-23 1982-10-25 Process for fabricating a semiconductor device having a phosphosilicate glass layer

Country Status (5)

Country Link
US (1) US4430152A (enExample)
EP (1) EP0078173B1 (enExample)
JP (1) JPS5871628A (enExample)
DE (1) DE3276887D1 (enExample)
IE (1) IE53902B1 (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2537779B1 (fr) * 1982-12-10 1986-03-14 Commissariat Energie Atomique Procede de positionnement d'un trou de contact electrique entre deux lignes d'interconnexion d'un circuit integre
DE3623504A1 (de) * 1986-07-09 1988-01-21 Schering Ag Kupferaetzloesungen
DE3738651A1 (de) * 1987-11-13 1989-05-24 Wacker Chemitronic Verfahren zur hydrophilierenden und/oder kittreste entfernenden oberflaechenbehandlung von siliciumscheiben
JP2743409B2 (ja) * 1988-11-14 1998-04-22 ヤマハ株式会社 多層配線形成法
US4964919A (en) * 1988-12-27 1990-10-23 Nalco Chemical Company Cleaning of silicon wafers with an aqueous solution of KOH and a nitrogen-containing compound
JPH03211832A (ja) * 1990-01-17 1991-09-17 Fujitsu Ltd 半導体装置の製造方法
JP3185150B2 (ja) * 1991-03-15 2001-07-09 日本テキサス・インスツルメンツ株式会社 半導体装置の製造方法
US6267122B1 (en) * 1993-09-10 2001-07-31 Texas Instruments Incorporated Semiconductor cleaning solution and method
US5549786A (en) * 1995-08-29 1996-08-27 Advanced Micro Devices, Inc. Highly selective, highly uniform plasma etch process for spin-on glass
KR19980064028A (ko) * 1996-12-12 1998-10-07 윌리엄비.켐플러 금속의 사후 에칭 탈플루오르 저온 공정
KR100365741B1 (ko) * 1998-06-30 2003-02-19 주식회사 하이닉스반도체 반도체장치제조방법
US6444564B1 (en) 1998-11-23 2002-09-03 Advanced Micro Devices, Inc. Method and product for improved use of low k dielectric material among integrated circuit interconnect structures
JP3645144B2 (ja) * 2000-02-24 2005-05-11 Ｎｅｃエレクトロニクス株式会社 半導体装置の製造方法
JP4000743B2 (ja) * 2000-03-13 2007-10-31 株式会社デンソー 電子部品の実装方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52132687A (en) * 1976-04-28 1977-11-07 Fujitsu Ltd Production of semiconductor device
JPS5392666A (en) * 1977-01-25 1978-08-14 Seiko Epson Corp Manufacture of semiconductor device
JPS55138856A (en) * 1979-04-18 1980-10-30 Oki Electric Ind Co Ltd Method of fabricating semiconductor device
JPS56114319A (en) 1980-02-14 1981-09-08 Fujitsu Ltd Method for forming contact hole

Also Published As

Publication number Publication date
US4430152A (en) 1984-02-07
EP0078173B1 (en) 1987-07-29
JPH0263295B2 (enExample) 1990-12-27
IE53902B1 (en) 1989-04-12
EP0078173A2 (en) 1983-05-04
IE822564L (en) 1983-04-23
JPS5871628A (ja) 1983-04-28
EP0078173A3 (en) 1985-05-08

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Legal Events

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