DE3174565D1 - Non-volatile static semiconductor memory cell - Google Patents

Non-volatile static semiconductor memory cell

Info

Publication number
DE3174565D1
DE3174565D1 DE8181106438T DE3174565T DE3174565D1 DE 3174565 D1 DE3174565 D1 DE 3174565D1 DE 8181106438 T DE8181106438 T DE 8181106438T DE 3174565 T DE3174565 T DE 3174565T DE 3174565 D1 DE3174565 D1 DE 3174565D1
Authority
DE
Germany
Prior art keywords
memory cell
semiconductor memory
static semiconductor
volatile static
volatile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181106438T
Other languages
English (en)
Inventor
Harish Narandas Kotecha
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3174565D1 publication Critical patent/DE3174565D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C14/00Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7882Programmable transistors with only two possible levels of programmation charging by injection of carriers through a conductive insulator, e.g. Poole-Frankel conduction
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903FET configuration adapted for use as static memory cell
    • Y10S257/904FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
DE8181106438T 1980-09-30 1981-08-19 Non-volatile static semiconductor memory cell Expired DE3174565D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/192,580 US4399522A (en) 1980-09-30 1980-09-30 Non-volatile static RAM cell with enhanced conduction insulators

Publications (1)

Publication Number Publication Date
DE3174565D1 true DE3174565D1 (de) 1986-06-12

Family

ID=22710263

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181106438T Expired DE3174565D1 (de) 1980-09-30 1981-08-19 Non-volatile static semiconductor memory cell

Country Status (4)

Country Link
US (1) US4399522A (de)
EP (1) EP0048815B1 (de)
JP (1) JPS5922317B2 (de)
DE (1) DE3174565D1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939559A (en) * 1981-12-14 1990-07-03 International Business Machines Corporation Dual electron injector structures using a conductive oxide between injectors
US4471471A (en) * 1981-12-31 1984-09-11 International Business Machines Corporation Non-volatile RAM device
US4717943A (en) * 1984-06-25 1988-01-05 International Business Machines Charge storage structure for nonvolatile memories
US4729115A (en) * 1984-09-27 1988-03-01 International Business Machines Corporation Non-volatile dynamic random access memory cell
JPS61105201A (ja) * 1984-10-29 1986-05-23 Osaka Kanagu Kk ホイ−ルロツク
DE10009409A1 (de) 2000-02-28 2001-08-30 Wolff Walsrode Ag Verfahren zur Herstellung von pulverförmigen wasserlöslichen Cellulosederivaten
DE10009411A1 (de) 2000-02-28 2001-08-30 Wolff Walsrode Ag Verfahren zur Herstellung pulverförmiger wasserlöslicher Cellulosederivate unter Einsatz eines Wasserdampf/Inertgas-Gemisch oder Wasserdampf/Luft-Gemisch als Transport und Wärmeträgergas
WO2005059922A1 (en) * 2003-12-12 2005-06-30 X-Fab Semiconductor Foundries Ag Non-volatile semiconductor latch using hot-electron injection devices

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3676717A (en) * 1970-11-02 1972-07-11 Ncr Co Nonvolatile flip-flop memory cell
US3728695A (en) * 1971-10-06 1973-04-17 Intel Corp Random-access floating gate mos memory array
JPS5228824A (en) * 1975-08-29 1977-03-04 Toshiba Corp Multiple storage unit
US4095281A (en) * 1976-03-04 1978-06-13 Rca Corporation Random access-erasable read only memory cell
US4175290A (en) * 1977-07-28 1979-11-20 Hughes Aircraft Company Integrated semiconductor memory array having improved logic latch circuitry
US4103348A (en) * 1977-08-29 1978-07-25 Westinghouse Electric Corp. Volatile and nonvolatile random access memory cell
US4128773A (en) * 1977-11-07 1978-12-05 Hughes Aircraft Company Volatile/non-volatile logic latch circuit
US4207615A (en) * 1978-11-17 1980-06-10 Intel Corporation Non-volatile ram cell
US4217601A (en) * 1979-02-15 1980-08-12 International Business Machines Corporation Non-volatile memory devices fabricated from graded or stepped energy band gap insulator MIM or MIS structure

Also Published As

Publication number Publication date
JPS5922317B2 (ja) 1984-05-25
EP0048815A2 (de) 1982-04-07
EP0048815A3 (en) 1983-08-10
EP0048815B1 (de) 1986-05-07
JPS5764391A (en) 1982-04-19
US4399522A (en) 1983-08-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee