DE3138718C2 - Halbleiterbauelement und Verfahren zu dessen Herstellung - Google Patents

Halbleiterbauelement und Verfahren zu dessen Herstellung

Info

Publication number
DE3138718C2
DE3138718C2 DE3138718A DE3138718A DE3138718C2 DE 3138718 C2 DE3138718 C2 DE 3138718C2 DE 3138718 A DE3138718 A DE 3138718A DE 3138718 A DE3138718 A DE 3138718A DE 3138718 C2 DE3138718 C2 DE 3138718C2
Authority
DE
Germany
Prior art keywords
glass
film
silicon wafer
silicon
aluminum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3138718A
Other languages
German (de)
English (en)
Other versions
DE3138718A1 (de
Inventor
Hiroshi Sayama Tsuneno
Hideharu Tokio/Tokyo Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE3138718A1 publication Critical patent/DE3138718A1/de
Application granted granted Critical
Publication of DE3138718C2 publication Critical patent/DE3138718C2/de
Expired legal-status Critical Current

Links

Classifications

    • H10W70/68—
    • H10W72/013—
    • H10W72/30—
    • H10W70/682—
    • H10W72/073—
    • H10W72/07331—
    • H10W72/07337—
    • H10W72/59—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Die Bonding (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Joining Of Glass To Other Materials (AREA)
DE3138718A 1980-10-01 1981-09-29 Halbleiterbauelement und Verfahren zu dessen Herstellung Expired DE3138718C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55135869A JPS5762539A (en) 1980-10-01 1980-10-01 Mounting method for semiconductor element

Publications (2)

Publication Number Publication Date
DE3138718A1 DE3138718A1 (de) 1982-04-22
DE3138718C2 true DE3138718C2 (de) 1985-06-27

Family

ID=15161666

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3138718A Expired DE3138718C2 (de) 1980-10-01 1981-09-29 Halbleiterbauelement und Verfahren zu dessen Herstellung

Country Status (6)

Country Link
US (2) US4437228A (index.php)
JP (1) JPS5762539A (index.php)
DE (1) DE3138718C2 (index.php)
FR (1) FR2491259B1 (index.php)
GB (1) GB2084399B (index.php)
IT (1) IT1144882B (index.php)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59117242A (ja) * 1982-12-24 1984-07-06 Hitachi Hokkai Semiconductor Kk 半導体装置
GB2134704A (en) * 1983-01-24 1984-08-15 Larontrol Ltd Semiconductor mounting arrangements
US4688075A (en) * 1983-07-22 1987-08-18 Fairchild Semiconductor Corporation Integrated circuit having a pre-attached conductive mounting media and method of making the same
DE3335184A1 (de) * 1983-09-28 1985-04-04 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von halbleiterbausteinen
US4729010A (en) * 1985-08-05 1988-03-01 Hitachi, Ltd. Integrated circuit package with low-thermal expansion lead pieces
JP2502511B2 (ja) * 1986-02-06 1996-05-29 日立マクセル株式会社 半導体装置の製造方法
US4866505A (en) * 1986-03-19 1989-09-12 Analog Devices, Inc. Aluminum-backed wafer and chip
JPH0711461B2 (ja) * 1986-06-13 1995-02-08 株式会社日本自動車部品総合研究所 圧力検出器
US5043535A (en) * 1989-03-10 1991-08-27 Olin Corporation Hermetic cerglass and cermet electronic packages
US5200241A (en) * 1989-05-18 1993-04-06 General Electric Company Metal-ceramic structure with intermediate high temperature reaction barrier layer
US5041396A (en) * 1989-07-18 1991-08-20 Vlsi Technology, Inc. Reusable package for holding a semiconductor chip and method for reusing the package
US5237206A (en) * 1989-07-21 1993-08-17 Kabushiki Kaisha Toshiba Low-melting point glass sealed semiconductor device and method of manufacturing the same
EP0409257A3 (en) * 1989-07-21 1991-04-03 Kabushiki Kaisha Toshiba Low-melting point glass sealed semiconductor device and method of manufacturing the same
EP0409004A3 (en) * 1989-07-21 1991-04-03 Kabushiki Kaisha Toshiba Low-melting point glass sealed semiconductor device and method of manufacturing the same
US5311399A (en) * 1992-06-24 1994-05-10 The Carborundum Company High power ceramic microelectronic package
RU2139598C1 (ru) * 1999-03-23 1999-10-10 Пырченков Владислав Николаевич Способ изготовления полупроводникового модуля
KR100332967B1 (ko) * 2000-05-10 2002-04-19 윤종용 디지털 마이크로-미러 디바이스 패키지의 제조 방법
US6661102B1 (en) * 2002-01-18 2003-12-09 Advance Micro Devices, Inc. Semiconductor packaging apparatus for controlling die attach fillet height to reduce die shear stress
TWI251910B (en) * 2004-06-29 2006-03-21 Phoenix Prec Technology Corp Semiconductor device buried in a carrier and a method for fabricating the same
US20110128237A1 (en) * 2009-12-02 2011-06-02 Rothkopf Fletcher R Thinned-Portion Substrates
TWI446495B (zh) * 2011-01-19 2014-07-21 旭德科技股份有限公司 封裝載板及其製作方法
DE102012206362B4 (de) 2012-04-18 2021-02-25 Rohde & Schwarz GmbH & Co. Kommanditgesellschaft Schaltungsanordnung zur thermisch leitfähigen Chipmontage und Herstellungsverfahren
DE102016116499B4 (de) * 2016-09-02 2022-06-15 Infineon Technologies Ag Verfahren zum Bilden von Halbleiterbauelementen und Halbleiterbauelemente

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3405224A (en) * 1966-04-20 1968-10-08 Nippon Electric Co Sealed enclosure for electronic device
DE1914657A1 (de) * 1968-04-03 1970-01-08 Itt Industriesgmbh Deutsche Aufbau fuer Halbleiterelement

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3256465A (en) * 1962-06-08 1966-06-14 Signetics Corp Semiconductor device assembly with true metallurgical bonds
GB1037534A (en) * 1963-03-14 1966-07-27 Ultra Electronics Ltd A method of bonding metal or silicon to glass
US3828425A (en) 1970-10-16 1974-08-13 Texas Instruments Inc Method for making semiconductor packaged devices and assemblies
US3793064A (en) * 1971-11-15 1974-02-19 Du Pont Product and process for cavity metallization of semiconductor packages
JPS5246016B2 (index.php) * 1972-06-05 1977-11-21
US4032350A (en) * 1973-03-12 1977-06-28 Owens-Illinois, Inc. Printing paste vehicle, gold dispensing paste and method of using the paste in the manufacture of microelectronic circuitry components
US4262165A (en) 1976-03-26 1981-04-14 Hitachi, Ltd. Packaging structure for semiconductor IC chip
US4376287A (en) * 1980-10-29 1983-03-08 Rca Corporation Microwave power circuit with an active device mounted on a heat dissipating substrate
US4401767A (en) * 1981-08-03 1983-08-30 Johnson Matthey Inc. Silver-filled glass
JPS5842260A (ja) * 1981-09-07 1983-03-11 Mitsubishi Electric Corp 半導体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3405224A (en) * 1966-04-20 1968-10-08 Nippon Electric Co Sealed enclosure for electronic device
DE1914657A1 (de) * 1968-04-03 1970-01-08 Itt Industriesgmbh Deutsche Aufbau fuer Halbleiterelement

Also Published As

Publication number Publication date
GB2084399B (en) 1984-09-19
JPS5762539A (en) 1982-04-15
DE3138718A1 (de) 1982-04-22
GB2084399A (en) 1982-04-07
IT8168266A0 (it) 1981-09-30
FR2491259A1 (fr) 1982-04-02
FR2491259B1 (fr) 1986-07-04
US4554573A (en) 1985-11-19
JPH0222540B2 (index.php) 1990-05-18
IT1144882B (it) 1986-10-29
US4437228A (en) 1984-03-20

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8128 New person/name/address of the agent

Representative=s name: VON FUENER, A., DIPL.-CHEM. DR.RER.NAT. EBBINGHAUS

8181 Inventor (new situation)

Free format text: YAMAMOTO, HIDEHARU, TOKIO/TOKYO, JP TSUNENO, HIROSHI, SAYAMA, JP

D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee