DE3070152D1 - Semiconductor memory device including integrated injection logic memory cells - Google Patents

Semiconductor memory device including integrated injection logic memory cells

Info

Publication number
DE3070152D1
DE3070152D1 DE8080302483T DE3070152T DE3070152D1 DE 3070152 D1 DE3070152 D1 DE 3070152D1 DE 8080302483 T DE8080302483 T DE 8080302483T DE 3070152 T DE3070152 T DE 3070152T DE 3070152 D1 DE3070152 D1 DE 3070152D1
Authority
DE
Germany
Prior art keywords
device including
integrated injection
including integrated
injection logic
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8080302483T
Other languages
English (en)
Inventor
Kazuhiro Toyoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP54095346A external-priority patent/JPS5845115B2/ja
Priority claimed from JP54095697A external-priority patent/JPS5827916B2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3070152D1 publication Critical patent/DE3070152D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/416—Read-write [R-W] circuits 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
DE8080302483T 1979-07-26 1980-07-22 Semiconductor memory device including integrated injection logic memory cells Expired DE3070152D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP54095346A JPS5845115B2 (ja) 1979-07-26 1979-07-26 半導体メモリ書込回路
JP54095697A JPS5827916B2 (ja) 1979-07-27 1979-07-27 ビット線レベル制御回路

Publications (1)

Publication Number Publication Date
DE3070152D1 true DE3070152D1 (en) 1985-03-28

Family

ID=26436601

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8080302483T Expired DE3070152D1 (en) 1979-07-26 1980-07-22 Semiconductor memory device including integrated injection logic memory cells

Country Status (3)

Country Link
US (1) US4398268A (de)
EP (1) EP0023408B1 (de)
DE (1) DE3070152D1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6047665B2 (ja) * 1981-01-29 1985-10-23 富士通株式会社 スタティック半導体メモリ
JPS58159294A (ja) * 1982-03-17 1983-09-21 Hitachi Ltd 半導体記憶装置
EP0216264A1 (de) * 1985-09-19 1987-04-01 Siemens Aktiengesellschaft Schaltungsanordnung zur Schreib-Lese-Steuerung in einem ECL-Speicher
US4712193A (en) * 1985-11-21 1987-12-08 Motorola, Inc. Current steering differential write circuit for memory cells
JPS62202537A (ja) * 1986-02-19 1987-09-07 Hitachi Ltd 半導体集積回路装置
DE4022139A1 (de) * 1990-07-11 1992-01-16 Telefunken Electronic Gmbh I(pfeil hoch)2(pfeil hoch)l-logik-gatter

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7309453A (nl) * 1973-07-06 1975-01-08 Philips Nv Geheugenmatrix.
US3986178A (en) * 1975-07-28 1976-10-12 Texas Instruments Integrated injection logic random access memory
US4078261A (en) * 1976-01-02 1978-03-07 Motorola, Inc. Sense/write circuits for bipolar random access memory
DE2964943D1 (en) * 1978-05-11 1983-04-07 Nippon Telegraph & Telephone Semiconductor integrated memory circuit
US4272811A (en) * 1979-10-15 1981-06-09 Advanced Micro Devices, Inc. Write and read control circuit for semiconductor memories
US4302823A (en) * 1979-12-27 1981-11-24 International Business Machines Corp. Differential charge sensing system

Also Published As

Publication number Publication date
EP0023408A2 (de) 1981-02-04
EP0023408A3 (en) 1981-08-12
EP0023408B1 (de) 1985-02-13
US4398268A (en) 1983-08-09

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee