DE2965935D1 - Computer instruction prefetch circuit - Google Patents

Computer instruction prefetch circuit

Info

Publication number
DE2965935D1
DE2965935D1 DE7979103602T DE2965935T DE2965935D1 DE 2965935 D1 DE2965935 D1 DE 2965935D1 DE 7979103602 T DE7979103602 T DE 7979103602T DE 2965935 T DE2965935 T DE 2965935T DE 2965935 D1 DE2965935 D1 DE 2965935D1
Authority
DE
Germany
Prior art keywords
computer instruction
instruction prefetch
prefetch circuit
circuit
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE7979103602T
Other languages
English (en)
Inventor
Neil Clair Berglund
William George Kempke
William Cain Richardson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE2965935D1 publication Critical patent/DE2965935D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3814—Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
DE7979103602T 1978-10-23 1979-09-24 Computer instruction prefetch circuit Expired DE2965935D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/954,068 US4298927A (en) 1978-10-23 1978-10-23 Computer instruction prefetch circuit

Publications (1)

Publication Number Publication Date
DE2965935D1 true DE2965935D1 (en) 1983-08-25

Family

ID=25494888

Family Applications (1)

Application Number Title Priority Date Filing Date
DE7979103602T Expired DE2965935D1 (en) 1978-10-23 1979-09-24 Computer instruction prefetch circuit

Country Status (4)

Country Link
US (1) US4298927A (de)
EP (1) EP0010188B1 (de)
JP (1) JPS5831014B2 (de)
DE (1) DE2965935D1 (de)

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EP0036093B1 (de) * 1980-02-25 1988-08-10 Kabushiki Kaisha Toshiba Datenverarbeitungssystem, das aus einer arithmetischen Ein-Chip-Kontrolleinheit unter Verwendung einer hochintegrierten Halbleitervorrichtung besteht
CA1174370A (en) * 1980-05-19 1984-09-11 Hidekazu Matsumoto Data processing unit with pipelined operands
USRE32493E (en) * 1980-05-19 1987-09-01 Hitachi, Ltd. Data processing unit with pipelined operands
JPS57185545A (en) * 1981-05-11 1982-11-15 Hitachi Ltd Information processor
DE3120713A1 (de) * 1981-05-25 1982-12-09 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung fuer ein prozessorsystem
WO1984000833A1 (en) * 1982-08-23 1984-03-01 Western Electric Co Pre-execution next address calculating mechanism
WO1985001368A1 (en) * 1983-09-12 1985-03-28 Motorola, Inc. Prefetch validation
JPS6225302A (ja) * 1985-07-25 1987-02-03 Fanuc Ltd 数値制御装置
US4761731A (en) * 1985-08-14 1988-08-02 Control Data Corporation Look-ahead instruction fetch control for a cache memory
US4722047A (en) * 1985-08-29 1988-01-26 Ncr Corporation Prefetch circuit and associated method for operation with a virtual command emulator
EP0229619B1 (de) * 1986-01-07 1997-08-06 Nec Corporation Befehlsvorabrufgerät mit einer Schaltung zum Prüfen der Vorhersage eines Verzweigungsbefehls vor seiner Ausführung
US4797817A (en) * 1986-12-10 1989-01-10 Ncr Corporation Single cycle store operations in a virtual memory
JPS63181005A (ja) * 1987-01-23 1988-07-26 Fanuc Ltd 数値制御装置の並列処理方式
US5119484A (en) * 1987-02-24 1992-06-02 Digital Equipment Corporation Selections between alternate control word and current instruction generated control word for alu in respond to alu output and current instruction
JPS63317828A (ja) * 1987-06-19 1988-12-26 Fujitsu Ltd マイクロコ−ド読み出し制御方式
US5058007A (en) * 1987-11-05 1991-10-15 Raytheon Company Next microinstruction generator in a microprogram control unit
JPH02190930A (ja) * 1988-12-29 1990-07-26 Internatl Business Mach Corp <Ibm> ソフトウエア命令実行装置
JPH02306341A (ja) * 1989-02-03 1990-12-19 Nec Corp マイクロプロセッサ
US5329621A (en) * 1989-10-23 1994-07-12 Motorola, Inc. Microprocessor which optimizes bus utilization based upon bus speed
US5537552A (en) * 1990-11-27 1996-07-16 Canon Kabushiki Kaisha Apparatus for selectively comparing pointers to detect full or empty status of a circular buffer area in an input/output (I/O) buffer
JP2839730B2 (ja) * 1991-02-25 1998-12-16 株式会社東芝 エミュレーション装置及び半導体装置
JPH05173779A (ja) * 1991-12-25 1993-07-13 Toshiba Corp デジタル演算集積回路
US5367657A (en) * 1992-10-01 1994-11-22 Intel Corporation Method and apparatus for efficient read prefetching of instruction code data in computer memory subsystems
JP2596712B2 (ja) * 1993-07-01 1997-04-02 インターナショナル・ビジネス・マシーンズ・コーポレイション 近接した分岐命令を含む命令の実行を管理するシステム及び方法
JPH07182170A (ja) * 1993-12-24 1995-07-21 Ricoh Co Ltd マイクロプロセッサ
US5734856A (en) * 1994-04-05 1998-03-31 Seiko Epson Corporation System and method for generating supplemental ready signals to eliminate wasted cycles between operations
US6401192B1 (en) 1998-10-05 2002-06-04 International Business Machines Corporation Apparatus for software initiated prefetch and method therefor
KR20150071373A (ko) * 2013-12-18 2015-06-26 삼성디스플레이 주식회사 디스플레이 드라이버 및 이를 포함하는 영상 신호 처리 시스템

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Publication number Priority date Publication date Assignee Title
US3162841A (en) * 1961-11-14 1964-12-22 Ibm Instruction counter system
US3293616A (en) * 1963-07-03 1966-12-20 Ibm Computer instruction sequencing and control system
US3426330A (en) * 1966-02-14 1969-02-04 Burroughs Corp Central data processor
US3559183A (en) * 1968-02-29 1971-01-26 Ibm Instruction sequence control
US3593306A (en) * 1969-07-25 1971-07-13 Bell Telephone Labor Inc Apparatus for reducing memory fetches in program loops
JPS529109B2 (de) * 1971-09-17 1977-03-14
BE789583A (fr) * 1971-10-01 1973-02-01 Sanders Associates Inc Appareil de controle de programme pour machine de traitement del'information
US3811114A (en) * 1973-01-11 1974-05-14 Honeywell Inf Systems Data processing system having an improved overlap instruction fetch and instruction execution feature
FR2226079A5 (de) * 1973-04-13 1974-11-08 Honeywell Bull Soc Ind
GB1426749A (en) * 1973-06-05 1976-03-03 Burroughs Corp Micro programme data processor having parallel instruction flow streams for plural level of subinstruction sets
JPS5024044A (de) * 1973-07-04 1975-03-14
IT993428B (it) * 1973-09-26 1975-09-30 Honeywell Inf Systems Unita di controllo di calcolatore microprogrammato con microprogram mi residenti in memoria e sovrap posizioni delle fasi interpretati ve di una microistruzione con la fase esecutiva della precedente microistruzione
US4050058A (en) * 1973-12-26 1977-09-20 Xerox Corporation Microprocessor with parallel operation
US3972024A (en) * 1974-03-27 1976-07-27 Burroughs Corporation Programmable microprocessor
US4004281A (en) * 1974-10-30 1977-01-18 Motorola, Inc. Microprocessor chip register bus structure
US4032896A (en) * 1974-10-30 1977-06-28 Motorola, Inc. Microprocessor having index register coupled to serial-coupled address bus sections and to data bus
DE2557787C2 (de) * 1975-12-22 1982-09-09 Siemens AG, 1000 Berlin und 8000 München Vorausladeeinrichtung zum mikroprogrammierten und verdeckten Bereitstellen von Maschinenbefehlen unterschiedlichen Formats in einem Prozessor eines datenverarbeitenden Systems
US4062058A (en) * 1976-02-13 1977-12-06 The United States Of America As Represented By The Secretary Of The Navy Next address subprocessor
US4084227A (en) * 1976-09-24 1978-04-11 Sperry Rand Corporation Virtual address translator
US4153941A (en) * 1976-11-11 1979-05-08 Kearney & Trecker Corporation Timing circuit and method for controlling the operation of cyclical devices
US4079455A (en) * 1976-12-13 1978-03-14 Rca Corporation Microprocessor architecture
US4149245A (en) * 1977-06-09 1979-04-10 International Business Machines Corporation High speed store request processing control
US4179737A (en) * 1977-12-23 1979-12-18 Burroughs Corporation Means and methods for providing greater speed and flexibility of microinstruction sequencing

Also Published As

Publication number Publication date
EP0010188A1 (de) 1980-04-30
EP0010188B1 (de) 1983-07-20
US4298927A (en) 1981-11-03
JPS5559553A (en) 1980-05-06
JPS5831014B2 (ja) 1983-07-02

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee