DE2817135C3 - - Google Patents
Info
- Publication number
 - DE2817135C3 DE2817135C3 DE2817135A DE2817135A DE2817135C3 DE 2817135 C3 DE2817135 C3 DE 2817135C3 DE 2817135 A DE2817135 A DE 2817135A DE 2817135 A DE2817135 A DE 2817135A DE 2817135 C3 DE2817135 C3 DE 2817135C3
 - Authority
 - DE
 - Germany
 - Prior art keywords
 - chip
 - data
 - signal
 - address
 - command
 - Prior art date
 - Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
 - Expired
 
Links
Classifications
- 
        
- G—PHYSICS
 - G11—INFORMATION STORAGE
 - G11C—STATIC STORES
 - G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
 - G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
 - G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
 - G11C19/0875—Organisation of a plurality of magnetic shift registers
 
 - 
        
- G—PHYSICS
 - G06—COMPUTING OR CALCULATING; COUNTING
 - G06F—ELECTRIC DIGITAL DATA PROCESSING
 - G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
 - G06F13/14—Handling requests for interconnection or transfer
 - G06F13/16—Handling requests for interconnection or transfer for access to memory bus
 - G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
 - G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
 - G06F13/1626—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by reordering requests
 - G06F13/1631—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by reordering requests through address comparison
 
 - 
        
- G—PHYSICS
 - G06—COMPUTING OR CALCULATING; COUNTING
 - G06F—ELECTRIC DIGITAL DATA PROCESSING
 - G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
 - G06F13/14—Handling requests for interconnection or transfer
 - G06F13/16—Handling requests for interconnection or transfer for access to memory bus
 - G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
 - G06F13/1642—Handling requests for interconnection or transfer for access to memory bus based on arbitration with request queuing
 
 
Landscapes
- Engineering & Computer Science (AREA)
 - Theoretical Computer Science (AREA)
 - Physics & Mathematics (AREA)
 - General Engineering & Computer Science (AREA)
 - General Physics & Mathematics (AREA)
 - Signal Processing For Digital Recording And Reproducing (AREA)
 - Techniques For Improving Reliability Of Storages (AREA)
 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP4444477A JPS53129923A (en) | 1977-04-20 | 1977-04-20 | Control system for input/output device | 
Publications (3)
| Publication Number | Publication Date | 
|---|---|
| DE2817135A1 DE2817135A1 (de) | 1979-03-15 | 
| DE2817135B2 DE2817135B2 (de) | 1980-05-14 | 
| DE2817135C3 true DE2817135C3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-01-22 | 
Family
ID=12691652
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| DE2817135A Granted DE2817135B2 (de) | 1977-04-20 | 1978-04-19 | Magnetblasenspeicher-Gerät | 
Country Status (5)
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| US4468729A (en) * | 1981-06-29 | 1984-08-28 | Sperry Corporation | Automatic memory module address assignment system for available memory modules | 
| US4470128A (en) * | 1981-09-29 | 1984-09-04 | International Business Machines Corporation | Control arrangement for magnetic bubble memories | 
| US4583166A (en) * | 1982-10-08 | 1986-04-15 | International Business Machines Corporation | Roll mode for cached data storage | 
| US5860022A (en) * | 1994-07-26 | 1999-01-12 | Hitachi, Ltd. | Computer system and method of issuing input/output commands therefrom | 
| KR100533682B1 (ko) * | 2003-12-26 | 2005-12-05 | 삼성전자주식회사 | 플래시 메모리의 데이터 관리 장치 및 방법 | 
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| JPS511575B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1972-04-07 | 1976-01-19 | ||
| US3737881A (en) * | 1972-04-13 | 1973-06-05 | Ibm | Implementation of the least recently used (lru) algorithm using magnetic bubble domains | 
| US3967263A (en) * | 1974-05-14 | 1976-06-29 | International Business Machines Corporation | Text editing system | 
| US3971005A (en) * | 1975-01-17 | 1976-07-20 | Gte Laboratories Incorporated | Dual access magnetic domain memory | 
| US3986016A (en) * | 1975-02-10 | 1976-10-12 | Texas Instruments Incorporated | Single chip magnetic bubble processor | 
| US4064556A (en) * | 1975-06-23 | 1977-12-20 | Sperry Rand Corporation | Packed loop memory with data manipulation capabilities | 
- 
        1977
        
- 1977-04-20 JP JP4444477A patent/JPS53129923A/ja active Pending
 
 - 
        1978
        
- 1978-04-18 US US05/897,392 patent/US4183090A/en not_active Expired - Lifetime
 - 1978-04-19 SE SE7804448A patent/SE421360B/sv not_active IP Right Cessation
 - 1978-04-19 DE DE2817135A patent/DE2817135B2/de active Granted
 - 1978-04-20 GB GB15723/78A patent/GB1601892A/en not_active Expired
 
 
Also Published As
| Publication number | Publication date | 
|---|---|
| SE421360B (sv) | 1981-12-14 | 
| JPS53129923A (en) | 1978-11-13 | 
| US4183090A (en) | 1980-01-08 | 
| GB1601892A (en) | 1981-11-04 | 
| DE2817135A1 (de) | 1979-03-15 | 
| DE2817135B2 (de) | 1980-05-14 | 
| SE7804448L (sv) | 1978-10-21 | 
Similar Documents
| Publication | Publication Date | Title | 
|---|---|---|
| DE2635592C2 (de) | Schaltungsanordnung zum Abruf von Prozessor- und Speicheranforderungen in einer Multiprozessoranlage | |
| DE3508291C2 (de) | Datenverarbeitungssystem | |
| DE2451008C2 (de) | Schaltungsanordnung zur Steuerung der Datenübertragung innerhalb einer digitalen Rechenanlage | |
| DE3301628A1 (de) | Schaltungsanordnung fuer den datenaustausch zwischen zwei rechnern | |
| DE2209282B2 (de) | Datenverarbeitungsanlage | |
| DE2162806A1 (de) | Digitales Eingabe-Ausgabe-Steuersystem mit Kanalpufferung | |
| DE2928488A1 (de) | Speicher-subsystem | |
| DE1424732A1 (de) | Elektronische Ziffernrechenmaschine | |
| DE2122338A1 (de) | Schaltungsanordnung zur Steuerung des Datenflusses in Datenverarbeitungsanlagen | |
| DE2237672A1 (de) | Fehlerpruef- und fehlerdiagnoseeinrichtung in einer elektronischen datenverarbeitungsanlage und verfahren zu deren betrieb | |
| DE1499194A1 (de) | Speichersystem | |
| DE1524111C3 (de) | Elektronische Datenverarbeitungsanlage | |
| DE2063195C2 (de) | Verfahren und Einrichtung zur Operationssteuerung einer Anzahl von externen Datenspeichern | |
| DE2115198A1 (de) | Verfahren zum Wiederauffinden von Datensätzen | |
| DE3013064C2 (de) | Schaltungsanordnung zur Übertragung von Bitgruppen zwischen einer von mehreren peripheren Einheiten und einem Pufferspeicher | |
| DE1524152C3 (de) | Steuereinrichtung für die Übertragung von Informationseinheiten von den endlos umlaufenden Speicherspuren eines Magnetplattenspeichers zu dem Hauptspeicher eines Datenverarbeitungssystems | |
| DE2817135C3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| DE3048414A1 (de) | "schaltungsanordnung fuer eine datenverarbeitungsanlage" | |
| DE1191145B (de) | Elektronische Zifferrechenmaschine | |
| DE1237812B (de) | Datenverarbeitungsgeraet mit mehreren Speichern | |
| DE2517170C2 (de) | Schaltungsanordnung zum Unterbrechen des Programmablaufs in Datenverarbeitungsanlagen mit mehreren Ansteuereinrichtungen von Sekundärspeichern und dergleichen Speichereinheiten mit sequentiellem Zugriff | |
| DE1499742A1 (de) | Steuerbare Speicherzugriffsvorrichtung fuer Speichereinrichtungen von Datenverarbeitungsanlagen mit Multiprogrammverarbeitung | |
| DE2312415A1 (de) | Schaltungsanordnung zur verbindung einer datenverarbeitungseinheit mit einer vielzahl von uebertragungsleitungen | |
| DE2720842B2 (de) | Datenübertragungssystem | |
| DE2343501C3 (de) | Steuerschaltung für zumindest eine Rechenanlage mit mehreren für die Durchführung von Ein-/Ausgabe-Programmen bestimmten Registern | 
Legal Events
| Date | Code | Title | Description | 
|---|---|---|---|
| OAP | Request for examination filed | ||
| OD | Request for examination | ||
| C3 | Grant after two publication steps (3rd publication) | ||
| 8327 | Change in the person/name/address of the patent owner | 
             Owner name: HITACHI, LTD. NIPPON TELEGRAPH AND TELEPHONE CORP.  | 
        |
| 8328 | Change in the person/name/address of the agent | 
             Free format text: BEETZ SEN., R., DIPL.-ING. BEETZ JUN., R., DIPL.-ING. DR.-ING. TIMPE, W., DR.-ING. SIEGFRIED, J., DIPL.-ING. SCHMITT-FUMIAN, W., PRIVATDOZENT, DIPL.-CHEM. DR.RER.NAT., PAT.-ANW., 8000 MUENCHEN  | 
        |
| 8339 | Ceased/non-payment of the annual fee |