DE2433981B2 - - Google Patents
Info
- Publication number
- DE2433981B2 DE2433981B2 DE2433981A DE2433981A DE2433981B2 DE 2433981 B2 DE2433981 B2 DE 2433981B2 DE 2433981 A DE2433981 A DE 2433981A DE 2433981 A DE2433981 A DE 2433981A DE 2433981 B2 DE2433981 B2 DE 2433981B2
- Authority
- DE
- Germany
- Prior art keywords
- base
- semiconductor
- speech path
- contact
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 31
- 238000002955 isolation Methods 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 5
- 230000008878 coupling Effects 0.000 claims description 4
- 238000010168 coupling process Methods 0.000 claims description 4
- 238000005859 coupling reaction Methods 0.000 claims description 4
- 239000012535 impurity Substances 0.000 claims description 3
- 230000003071 parasitic effect Effects 0.000 description 8
- 238000003780 insertion Methods 0.000 description 4
- 230000037431 insertion Effects 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 230000002441 reversible effect Effects 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/72—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices having more than two PN junctions; having more than three electrodes; having more than one electrode connected to the same conductivity region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/52—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
- H04Q3/521—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements using semiconductors in the switching stages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D18/00—Thyristors
- H10D18/251—Lateral thyristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/65—Integrated injection logic
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Electronic Switches (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1973084780U JPS5032942U (enrdf_load_stackoverflow) | 1973-07-23 | 1973-07-23 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| DE2433981A1 DE2433981A1 (de) | 1975-02-13 |
| DE2433981B2 true DE2433981B2 (enrdf_load_stackoverflow) | 1975-09-04 |
| DE2433981C3 DE2433981C3 (de) | 1985-01-10 |
Family
ID=13840191
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE2433981A Expired DE2433981C3 (de) | 1973-07-23 | 1974-07-15 | Halbleitersprechpfadschalter |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPS5032942U (enrdf_load_stackoverflow) |
| CA (1) | CA1026467A (enrdf_load_stackoverflow) |
| DE (1) | DE2433981C3 (enrdf_load_stackoverflow) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2049283B (en) * | 1978-12-20 | 1983-07-27 | Western Electric Co | High voltage dielectrically isolated solid-state switch |
| US4608590A (en) * | 1978-12-20 | 1986-08-26 | At&T Bell Laboratories | High voltage dielectrically isolated solid-state switch |
| US4587545A (en) * | 1978-12-20 | 1986-05-06 | At&T Bell Laboratories | High voltage dielectrically isolated remote gate solid-state switch |
| US4602268A (en) * | 1978-12-20 | 1986-07-22 | At&T Bell Laboratories | High voltage dielectrically isolated dual gate solid-state switch |
| US4587656A (en) * | 1979-12-28 | 1986-05-06 | At&T Bell Laboratories | High voltage solid-state switch |
| CA1145057A (en) * | 1979-12-28 | 1983-04-19 | Adrian R. Hartman | High voltage solid-state switch |
| JPH06151573A (ja) * | 1992-11-06 | 1994-05-31 | Hitachi Ltd | 半導体集積回路装置 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3381182A (en) * | 1964-10-19 | 1968-04-30 | Philco Ford Corp | Microcircuits having buried conductive layers |
| US3471922A (en) * | 1966-06-02 | 1969-10-14 | Raytheon Co | Monolithic integrated circuitry with dielectric isolated functional regions |
| US3431468A (en) * | 1967-04-17 | 1969-03-04 | Motorola Inc | Buried integrated circuit radiation shields |
-
1973
- 1973-07-23 JP JP1973084780U patent/JPS5032942U/ja active Pending
-
1974
- 1974-07-15 DE DE2433981A patent/DE2433981C3/de not_active Expired
- 1974-07-22 CA CA205,355A patent/CA1026467A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5032942U (enrdf_load_stackoverflow) | 1975-04-10 |
| CA1026467A (en) | 1978-02-14 |
| DE2433981A1 (de) | 1975-02-13 |
| DE2433981C3 (de) | 1985-01-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C3 | Grant after two publication steps (3rd publication) | ||
| 8339 | Ceased/non-payment of the annual fee |