DE2357007C3 - Schieberegisterspeicher mit mehrdimensionaler dynamischer Ordnung - Google Patents

Schieberegisterspeicher mit mehrdimensionaler dynamischer Ordnung

Info

Publication number
DE2357007C3
DE2357007C3 DE2357007A DE2357007A DE2357007C3 DE 2357007 C3 DE2357007 C3 DE 2357007C3 DE 2357007 A DE2357007 A DE 2357007A DE 2357007 A DE2357007 A DE 2357007A DE 2357007 C3 DE2357007 C3 DE 2357007C3
Authority
DE
Germany
Prior art keywords
shift
line
loops
access
word
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2357007A
Other languages
German (de)
English (en)
Other versions
DE2357007B2 (de
DE2357007A1 (de
Inventor
Byron Eugene Poughkeepsie N.Y. Phelps
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2357007A1 publication Critical patent/DE2357007A1/de
Publication of DE2357007B2 publication Critical patent/DE2357007B2/de
Application granted granted Critical
Publication of DE2357007C3 publication Critical patent/DE2357007C3/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/18—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
    • G11C19/182—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes
    • G11C19/188—Organisation of a multiplicity of shift registers, e.g. regeneration, timing or input-output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/287—Organisation of a multiplicity of shift registers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Shift Register Type Memory (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Read Only Memory (AREA)
DE2357007A 1972-11-15 1973-11-15 Schieberegisterspeicher mit mehrdimensionaler dynamischer Ordnung Expired DE2357007C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US30695272A 1972-11-15 1972-11-15

Publications (3)

Publication Number Publication Date
DE2357007A1 DE2357007A1 (de) 1974-05-22
DE2357007B2 DE2357007B2 (de) 1981-05-14
DE2357007C3 true DE2357007C3 (de) 1982-02-04

Family

ID=23187602

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2357007A Expired DE2357007C3 (de) 1972-11-15 1973-11-15 Schieberegisterspeicher mit mehrdimensionaler dynamischer Ordnung

Country Status (8)

Country Link
US (1) US3766534A (OSRAM)
JP (1) JPS5235577B2 (OSRAM)
CA (1) CA1000414A (OSRAM)
DE (1) DE2357007C3 (OSRAM)
FR (1) FR2206559B1 (OSRAM)
GB (1) GB1401098A (OSRAM)
IT (1) IT1001559B (OSRAM)
NL (1) NL7313154A (OSRAM)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3967263A (en) * 1974-05-14 1976-06-29 International Business Machines Corporation Text editing system
DE2459476B2 (de) * 1974-12-16 1977-01-20 Gesellschaft für Mathematik und Datenverarbeitung mbH, 5300 Bonn Schaltungsanordnung fuer nichtzyklische datenpermutationen
US3988601A (en) * 1974-12-23 1976-10-26 Rca Corporation Data processor reorder shift register memory
US3997880A (en) * 1975-03-07 1976-12-14 International Business Machines Corporation Apparatus and machine implementable method for the dynamic rearrangement of plural bit equal-length records
US4130885A (en) * 1976-08-19 1978-12-19 Massachusetts Institute Of Technology Packet memory system for processing many independent memory transactions concurrently
US4099256A (en) * 1976-11-16 1978-07-04 Bell Telephone Laboratories, Incorporated Method and apparatus for establishing, reading, and rapidly clearing a translation table memory
US4052704A (en) * 1976-12-20 1977-10-04 International Business Machines Corporation Apparatus for reordering the sequence of data stored in a serial memory
US4164041A (en) * 1977-01-27 1979-08-07 Bell Telephone Laboratories, Incorporated Memory organization to distribute power dissipation and to allow single circuit pack memory growth
US4238842A (en) * 1978-12-26 1980-12-09 Ibm Corporation LARAM Memory with reordered selection sequence for refresh
US4225947A (en) * 1978-12-29 1980-09-30 International Business Machines Corporation Three phase line-addressable serial-parallel-serial storage array
EP0240578B1 (de) * 1986-03-29 1991-07-17 Ibm Deutschland Gmbh Anordnung und Verfahren für externe Testzugriffe auf die chipinternen funktionellen Speicherelemente hochintegrierter logischer Netzwerke
US6022094A (en) * 1995-09-27 2000-02-08 Lexmark International, Inc. Memory expansion circuit for ink jet print head identification circuit
JP3268980B2 (ja) * 1996-09-02 2002-03-25 インターナショナル・ビジネス・マシーンズ・コーポレーション データ・バッファリング・システム
CN100485817C (zh) * 2003-03-14 2009-05-06 Nxp股份有限公司 二维数据存储器
US7873782B2 (en) * 2004-11-05 2011-01-18 Data Robotics, Inc. Filesystem-aware block storage system, apparatus, and method
CA2590361C (en) * 2004-11-05 2012-01-03 Data Robotics Incorporated Dynamically expandable and contractible fault-tolerant storage system permitting variously sized storage devices and method
WO2013115778A1 (en) * 2012-01-30 2013-08-08 Hewlett-Packard Development Company, L.P. Dynamic/static random access memory (d/sram)
US9589623B2 (en) * 2012-01-30 2017-03-07 Hewlett Packard Enterprise Development Lp Word shift static random access memory (WS-SRAM)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3704452A (en) * 1970-12-31 1972-11-28 Ibm Shift register storage unit
US3670313A (en) * 1971-03-22 1972-06-13 Ibm Dynamically ordered magnetic bubble shift register memory

Also Published As

Publication number Publication date
NL7313154A (OSRAM) 1974-05-17
DE2357007B2 (de) 1981-05-14
US3766534A (en) 1973-10-16
GB1401098A (en) 1975-07-16
JPS5235577B2 (OSRAM) 1977-09-09
DE2357007A1 (de) 1974-05-22
FR2206559A1 (OSRAM) 1974-06-07
IT1001559B (it) 1976-04-30
CA1000414A (en) 1976-11-23
JPS4979735A (OSRAM) 1974-08-01
FR2206559B1 (OSRAM) 1976-06-18

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Legal Events

Date Code Title Description
OD Request for examination
C3 Grant after two publication steps (3rd publication)
8339 Ceased/non-payment of the annual fee