DE2315202A1 - Flip-flop-schaltung - Google Patents

Flip-flop-schaltung

Info

Publication number
DE2315202A1
DE2315202A1 DE2315202A DE2315202A DE2315202A1 DE 2315202 A1 DE2315202 A1 DE 2315202A1 DE 2315202 A DE2315202 A DE 2315202A DE 2315202 A DE2315202 A DE 2315202A DE 2315202 A1 DE2315202 A1 DE 2315202A1
Authority
DE
Germany
Prior art keywords
field effect
transistor
effect transistor
input
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE2315202A
Other languages
German (de)
English (en)
Inventor
Hiroto Kawagoe
Kosei Nomiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE2315202A1 publication Critical patent/DE2315202A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356069—Bistable circuits using additional transistors in the feedback circuit
    • H03K3/356078—Bistable circuits using additional transistors in the feedback circuit with synchronous operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
    • H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation

Landscapes

  • Logic Circuits (AREA)
DE2315202A 1972-03-27 1973-03-27 Flip-flop-schaltung Pending DE2315202A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP47029729A JPS5219947B2 (US07413550-20080819-C00001.png) 1972-03-27 1972-03-27

Publications (1)

Publication Number Publication Date
DE2315202A1 true DE2315202A1 (de) 1973-10-04

Family

ID=12284177

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2315202A Pending DE2315202A1 (de) 1972-03-27 1973-03-27 Flip-flop-schaltung

Country Status (4)

Country Link
US (1) US3845329A (US07413550-20080819-C00001.png)
JP (1) JPS5219947B2 (US07413550-20080819-C00001.png)
DE (1) DE2315202A1 (US07413550-20080819-C00001.png)
NL (1) NL7304285A (US07413550-20080819-C00001.png)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53129812U (US07413550-20080819-C00001.png) * 1977-02-28 1978-10-14
JPH0342132Y2 (US07413550-20080819-C00001.png) * 1985-01-30 1991-09-04
JPS61206769U (US07413550-20080819-C00001.png) * 1985-06-11 1986-12-27

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1256752A (US07413550-20080819-C00001.png) * 1968-06-08 1971-12-15
US3697775A (en) * 1971-04-21 1972-10-10 Signetics Corp Three state output logic circuit with bistable inputs

Also Published As

Publication number Publication date
JPS5219947B2 (US07413550-20080819-C00001.png) 1977-05-31
US3845329A (en) 1974-10-29
NL7304285A (US07413550-20080819-C00001.png) 1973-10-01
JPS4898756A (US07413550-20080819-C00001.png) 1973-12-14

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Legal Events

Date Code Title Description
OHJ Non-payment of the annual fee