DE2143777C3 - Verfahren zur Herabsetzung der Minoritatstrager Lebensdauer einer Halbleiteranordnung mit einem pn Übergang - Google Patents

Verfahren zur Herabsetzung der Minoritatstrager Lebensdauer einer Halbleiteranordnung mit einem pn Übergang

Info

Publication number
DE2143777C3
DE2143777C3 DE2143777A DE2143777A DE2143777C3 DE 2143777 C3 DE2143777 C3 DE 2143777C3 DE 2143777 A DE2143777 A DE 2143777A DE 2143777 A DE2143777 A DE 2143777A DE 2143777 C3 DE2143777 C3 DE 2143777C3
Authority
DE
Germany
Prior art keywords
gadolinium
diffusion
minutes
semiconductor device
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2143777A
Other languages
German (de)
English (en)
Other versions
DE2143777A1 (de
DE2143777B2 (de
Inventor
Donald Frank Johnstown Pa. Stahr (V.St.A.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
FMC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FMC Corp filed Critical FMC Corp
Publication of DE2143777A1 publication Critical patent/DE2143777A1/de
Publication of DE2143777B2 publication Critical patent/DE2143777B2/de
Application granted granted Critical
Publication of DE2143777C3 publication Critical patent/DE2143777C3/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/904—Charge carrier lifetime control
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/917—Deep level dopants, e.g. gold, chromium, iron or nickel

Landscapes

  • Thyristors (AREA)
  • Electrodes Of Semiconductors (AREA)
DE2143777A 1970-12-10 1971-09-01 Verfahren zur Herabsetzung der Minoritatstrager Lebensdauer einer Halbleiteranordnung mit einem pn Übergang Expired DE2143777C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US9680170A 1970-12-10 1970-12-10

Publications (3)

Publication Number Publication Date
DE2143777A1 DE2143777A1 (de) 1972-07-06
DE2143777B2 DE2143777B2 (de) 1973-04-05
DE2143777C3 true DE2143777C3 (de) 1973-10-25

Family

ID=22259128

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2143777A Expired DE2143777C3 (de) 1970-12-10 1971-09-01 Verfahren zur Herabsetzung der Minoritatstrager Lebensdauer einer Halbleiteranordnung mit einem pn Übergang

Country Status (7)

Country Link
US (1) US3662232A (enExample)
JP (1) JPS505023B1 (enExample)
CA (1) CA938383A (enExample)
DE (1) DE2143777C3 (enExample)
FR (1) FR2117861B1 (enExample)
GB (1) GB1368119A (enExample)
SE (1) SE378477B (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3860947A (en) * 1970-03-19 1975-01-14 Hiroshi Gamo Thyristor with gold doping profile
US3975756A (en) * 1974-06-28 1976-08-17 The United States Of America As Represented By The Secretary Of The Army Gadolinium doped germanium
US4464648A (en) * 1981-07-20 1984-08-07 Delta Airlines, Inc. Display panel for aircraft parking
US5384477A (en) * 1993-03-09 1995-01-24 National Semiconductor Corporation CMOS latchup suppression by localized minority carrier lifetime reduction
US5418127A (en) * 1993-05-28 1995-05-23 Eastman Kodak Company Water-soluble disulfides in silver halide emulsions

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL301451A (enExample) * 1962-12-17
US3340108A (en) * 1963-07-09 1967-09-05 Semi Elements Inc Laser materials
US3311510A (en) * 1964-03-16 1967-03-28 Mandelkorn Joseph Method of making a silicon semiconductor device
DE1439347A1 (de) * 1964-03-18 1968-11-07 Siemens Ag Verfahren zum Herstellen eines Halbleiterstromtores vom pnpn-Typ
US3502515A (en) * 1964-09-28 1970-03-24 Philco Ford Corp Method of fabricating semiconductor device which includes region in which minority carriers have short lifetime
US3461356A (en) * 1965-08-19 1969-08-12 Matsushita Electric Industrial Co Ltd Negative resistance semiconductor device having an intrinsic region
US3440113A (en) * 1966-09-19 1969-04-22 Westinghouse Electric Corp Process for diffusing gold into semiconductor material
US3485684A (en) * 1967-03-30 1969-12-23 Trw Semiconductors Inc Dislocation enhancement control of silicon by introduction of large diameter atomic metals
US3486950A (en) * 1967-04-26 1969-12-30 Motorola Inc Localized control of carrier lifetimes in p-n junction devices and integrated circuits

Also Published As

Publication number Publication date
SE378477B (enExample) 1975-09-01
US3662232A (en) 1972-05-09
JPS505023B1 (enExample) 1975-02-27
DE2143777A1 (de) 1972-07-06
DE2143777B2 (de) 1973-04-05
CA938383A (en) 1973-12-11
GB1368119A (en) 1974-09-25
FR2117861A1 (enExample) 1972-07-28
FR2117861B1 (enExample) 1977-04-22

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
E77 Valid patent as to the heymanns-index 1977
8320 Willingness to grant licences declared (paragraph 23)
8327 Change in the person/name/address of the patent owner

Owner name: SIEMENS AG, 1000 BERLIN UND 8000 MUENCHEN, DE

8339 Ceased/non-payment of the annual fee