DE2106314C3 - Anordnung zur Fehlererkennung und -korrektur in einem aus b Bits bestehenden Byte eines K Datenbytes enthaltenden Datenblocks - Google Patents
Anordnung zur Fehlererkennung und -korrektur in einem aus b Bits bestehenden Byte eines K Datenbytes enthaltenden DatenblocksInfo
- Publication number
- DE2106314C3 DE2106314C3 DE2106314A DE2106314A DE2106314C3 DE 2106314 C3 DE2106314 C3 DE 2106314C3 DE 2106314 A DE2106314 A DE 2106314A DE 2106314 A DE2106314 A DE 2106314A DE 2106314 C3 DE2106314 C3 DE 2106314C3
- Authority
- DE
- Germany
- Prior art keywords
- data
- bits
- bytes
- byte
- syndrome
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000012937 correction Methods 0.000 title claims description 17
- 238000001514 detection method Methods 0.000 title claims description 3
- 238000012360 testing method Methods 0.000 claims description 3
- 208000011580 syndromic disease Diseases 0.000 description 21
- 239000011159 matrix material Substances 0.000 description 14
- 238000007792 addition Methods 0.000 description 9
- 230000008520 organization Effects 0.000 description 7
- 239000013598 vector Substances 0.000 description 7
- 238000012545 processing Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- 230000014509 gene expression Effects 0.000 description 2
- 229910002056 binary alloy Inorganic materials 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000000844 transformation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/134—Non-binary linear block codes not provided for otherwise
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/1575—Direct decoding, e.g. by a direct determination of the error locator polynomial from syndromes and subsequent analysis or by matrix operations involving syndromes, e.g. for codes with a small minimum Hamming distance
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/17—Burst error correction, e.g. error trapping, Fire codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Algebra (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US1084770A | 1970-02-12 | 1970-02-12 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| DE2106314A1 DE2106314A1 (de) | 1971-08-19 |
| DE2106314B2 DE2106314B2 (de) | 1978-03-16 |
| DE2106314C3 true DE2106314C3 (de) | 1978-10-26 |
Family
ID=21747711
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE2106314A Expired DE2106314C3 (de) | 1970-02-12 | 1971-02-10 | Anordnung zur Fehlererkennung und -korrektur in einem aus b Bits bestehenden Byte eines K Datenbytes enthaltenden Datenblocks |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US3629824A (enExample) |
| JP (1) | JPS5240545B1 (enExample) |
| CA (1) | CA932466A (enExample) |
| DE (1) | DE2106314C3 (enExample) |
| FR (1) | FR2080403A5 (enExample) |
| GB (1) | GB1279793A (enExample) |
| NL (1) | NL174418C (enExample) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| USRE28923E (en) * | 1971-12-27 | 1976-08-03 | International Business Machines Corporation | Error correction for two bytes in each code word in a multi-code word system |
| US3774154A (en) * | 1972-08-21 | 1973-11-20 | Ibm | Error control circuits and methods |
| US3868632A (en) * | 1972-11-15 | 1975-02-25 | Ibm | Plural channel error correcting apparatus and methods |
| USRE30187E (en) * | 1972-11-15 | 1980-01-08 | International Business Machines Corporation | Plural channel error correcting apparatus and methods |
| US3851306A (en) * | 1972-11-24 | 1974-11-26 | Ibm | Triple track error correction |
| US3800281A (en) * | 1972-12-26 | 1974-03-26 | Ibm | Error detection and correction systems |
| US3786439A (en) * | 1972-12-26 | 1974-01-15 | Ibm | Error detection systems |
| US3859630A (en) * | 1973-01-29 | 1975-01-07 | Burroughs Corp | Apparatus for detecting and correcting errors in digital information organized into a parallel format by use of cyclic polynomial error detecting and correcting codes |
| US3913068A (en) * | 1974-07-30 | 1975-10-14 | Ibm | Error correction of serial data using a subfield code |
| US3893071A (en) * | 1974-08-19 | 1975-07-01 | Ibm | Multi level error correction system for high density memory |
| GB1597218A (en) * | 1976-12-11 | 1981-09-03 | Nat Res Dev | Apparatus for electronic encypherment of digital data |
| GB2042228B (en) * | 1979-01-31 | 1983-09-14 | Tokyo Shibaura Electric Co | Data correcting system |
| JPS55149551A (en) * | 1979-05-10 | 1980-11-20 | Toshiba Corp | Data correcting circuit |
| JPS56119550A (en) * | 1980-02-25 | 1981-09-19 | Sony Corp | Transmission method of pcm signal |
| DE3028066A1 (de) | 1980-07-24 | 1982-02-18 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Schaltungsanordnung zur korrektur gestoerter abtastwerte bei einer pcm-uebertragungseinrichtung, insbesondere einer digital-tonplatte |
| US4862463A (en) * | 1987-07-20 | 1989-08-29 | International Business Machines Corp. | Error correcting code for 8-bit-per-chip memory with reduced redundancy |
| US4979173A (en) * | 1987-09-21 | 1990-12-18 | Cirrus Logic, Inc. | Burst mode error detection and definition |
| US5140595A (en) * | 1987-09-21 | 1992-08-18 | Cirrus Logic, Inc. | Burst mode error detection and definition |
| US5224106A (en) * | 1990-05-09 | 1993-06-29 | Digital Equipment Corporation | Multi-level error correction system |
| US5343481A (en) * | 1991-01-07 | 1994-08-30 | Kraft Clifford H | BCH error-location polynomial decoder |
| US5751740A (en) * | 1995-12-14 | 1998-05-12 | Gorca Memory Systems | Error detection and correction system for use with address translation memory controller |
| US7743311B2 (en) * | 2006-01-26 | 2010-06-22 | Hitachi Global Storage Technologies Netherlands, B.V. | Combined encoder/syndrome generator with reduced delay |
| WO2011119137A1 (en) | 2010-03-22 | 2011-09-29 | Lrdc Systems, Llc | A method of identifying and protecting the integrity of a set of source data |
| WO2016014423A1 (en) | 2014-07-21 | 2016-01-28 | Kandou Labs S.A. | Multidrop data transfer |
| CN115567164B (zh) * | 2017-04-14 | 2025-01-28 | 康杜实验室公司 | 向量信令码信道的流水线式前向纠错方法和装置 |
| US10693587B2 (en) | 2017-07-10 | 2020-06-23 | Kandou Labs, S.A. | Multi-wire permuted forward error correction |
| US11356197B1 (en) | 2021-03-19 | 2022-06-07 | Kandou Labs SA | Error-tolerant forward error correction ordered set message decoder |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL130511C (enExample) * | 1963-10-15 | |||
| US3458860A (en) * | 1965-03-08 | 1969-07-29 | Burroughs Corp | Error detection by redundancy checks |
| US3474413A (en) * | 1965-11-22 | 1969-10-21 | Dryden Hugh L | Parallel generation of the check bits of a pn sequence |
-
1970
- 1970-02-12 US US10847A patent/US3629824A/en not_active Expired - Lifetime
- 1970-12-23 FR FR7047667A patent/FR2080403A5/fr not_active Expired
-
1971
- 1971-01-11 GB GB0255/71A patent/GB1279793A/en not_active Expired
- 1971-01-25 CA CA103622A patent/CA932466A/en not_active Expired
- 1971-02-03 JP JP46003815A patent/JPS5240545B1/ja active Pending
- 1971-02-10 DE DE2106314A patent/DE2106314C3/de not_active Expired
- 1971-02-11 NL NLAANVRAGE7101866,A patent/NL174418C/xx not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| FR2080403A5 (enExample) | 1971-11-12 |
| NL7101866A (enExample) | 1971-08-16 |
| DE2106314A1 (de) | 1971-08-19 |
| NL174418B (nl) | 1984-01-02 |
| JPS5240545B1 (enExample) | 1977-10-13 |
| CA932466A (en) | 1973-08-21 |
| DE2106314B2 (de) | 1978-03-16 |
| NL174418C (nl) | 1984-06-01 |
| GB1279793A (en) | 1972-06-28 |
| US3629824A (en) | 1971-12-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C3 | Grant after two publication steps (3rd publication) | ||
| 8339 | Ceased/non-payment of the annual fee |