DE199744T1 - Fehlertolerante speichermatrix. - Google Patents

Fehlertolerante speichermatrix.

Info

Publication number
DE199744T1
DE199744T1 DE198585904754T DE85904754T DE199744T1 DE 199744 T1 DE199744 T1 DE 199744T1 DE 198585904754 T DE198585904754 T DE 198585904754T DE 85904754 T DE85904754 T DE 85904754T DE 199744 T1 DE199744 T1 DE 199744T1
Authority
DE
Germany
Prior art keywords
error
storage matrix
tolerant storage
tolerant
matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE198585904754T
Other languages
English (en)
Inventor
David Alan Dayton Oh 45459 Us Poeppelman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Publication of DE199744T1 publication Critical patent/DE199744T1/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE198585904754T 1984-09-28 1985-09-18 Fehlertolerante speichermatrix. Pending DE199744T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/655,854 US4692923A (en) 1984-09-28 1984-09-28 Fault tolerant memory
PCT/US1985/001783 WO1986002182A1 (en) 1984-09-28 1985-09-18 Fault tolerant memory array

Publications (1)

Publication Number Publication Date
DE199744T1 true DE199744T1 (de) 1987-03-19

Family

ID=24630661

Family Applications (2)

Application Number Title Priority Date Filing Date
DE8585904754T Expired - Lifetime DE3577151D1 (de) 1984-09-28 1985-09-18 Fehlertolerante speichermatrix.
DE198585904754T Pending DE199744T1 (de) 1984-09-28 1985-09-18 Fehlertolerante speichermatrix.

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE8585904754T Expired - Lifetime DE3577151D1 (de) 1984-09-28 1985-09-18 Fehlertolerante speichermatrix.

Country Status (7)

Country Link
US (1) US4692923A (de)
EP (1) EP0199744B1 (de)
JP (1) JPH0752596B2 (de)
CA (1) CA1238715A (de)
DE (2) DE3577151D1 (de)
IL (1) IL76431A (de)
WO (1) WO1986002182A1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0214508B1 (de) * 1985-09-11 1991-09-25 Siemens Aktiengesellschaft Integrierter Halbleiterspeicher
JPH01171199A (ja) * 1987-12-25 1989-07-06 Mitsubishi Electric Corp 半導体メモリ
US5268319A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
JPH0814985B2 (ja) * 1989-06-06 1996-02-14 富士通株式会社 半導体記憶装置
US5128941A (en) * 1989-12-20 1992-07-07 Bull Hn Information Systems Inc. Method of organizing a memory for fault tolerance
US5357521A (en) * 1990-02-14 1994-10-18 International Business Machines Corporation Address sensitive memory testing
US5392288A (en) * 1991-02-08 1995-02-21 Quantum Corporation Addressing technique for a fault tolerant block-structured storage device
JPH0520896A (ja) * 1991-07-16 1993-01-29 Mitsubishi Electric Corp 半導体記憶装置
US5289377A (en) * 1991-08-12 1994-02-22 Trw Inc. Fault-tolerant solid-state flight data recorder
US5347519A (en) * 1991-12-03 1994-09-13 Crosspoint Solutions Inc. Preprogramming testing in a field programmable gate array
KR950003013B1 (ko) * 1992-03-30 1995-03-29 삼성전자 주식회사 틀림정정회로를 가지는 이이피롬
KR960000681B1 (ko) * 1992-11-23 1996-01-11 삼성전자주식회사 반도체메모리장치 및 그 메모리쎌 어레이 배열방법
JP2967021B2 (ja) * 1993-01-25 1999-10-25 株式会社東芝 半導体メモリ装置
DE69424453T2 (de) * 1993-01-25 2001-04-19 Toshiba Kawasaki Kk Halbleiterspeicheranordnung mit einer Vielzahl von Wortleitungstreiberschaltungen
JP4802515B2 (ja) * 2005-03-01 2011-10-26 株式会社日立製作所 半導体装置
US8069377B2 (en) * 2006-06-26 2011-11-29 Micron Technology, Inc. Integrated circuit having memory array including ECC and column redundancy and method of operating the same
KR20080080882A (ko) * 2007-03-02 2008-09-05 삼성전자주식회사 Ｅｃｃ용 레이어를 구비하는 다층 구조 반도체 메모리 장치및 이를 이용하는 에러 검출 및 정정 방법

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3644902A (en) * 1970-05-18 1972-02-22 Ibm Memory with reconfiguration to avoid uncorrectable errors
US3898443A (en) * 1973-10-29 1975-08-05 Bell Telephone Labor Inc Memory fault correction system
US4321695A (en) * 1979-11-23 1982-03-23 Texas Instruments Incorporated High speed serial access semiconductor memory with fault tolerant feature
US4335459A (en) * 1980-05-20 1982-06-15 Miller Richard L Single chip random access memory with increased yield and reliability
US4412314A (en) * 1980-06-02 1983-10-25 Mostek Corporation Semiconductor memory for use in conjunction with error detection and correction circuit
JPS58139399A (ja) * 1982-02-15 1983-08-18 Hitachi Ltd 半導体記憶装置
FR2528613B1 (fr) * 1982-06-09 1991-09-20 Hitachi Ltd Memoire a semi-conducteurs
US4562576A (en) * 1982-08-14 1985-12-31 International Computers Limited Data storage apparatus
US4602354A (en) * 1983-01-10 1986-07-22 Ncr Corporation X-and-OR memory array
JPS59165300A (ja) * 1983-03-10 1984-09-18 Fujitsu Ltd メモリ障害訂正方式
US4542454A (en) * 1983-03-30 1985-09-17 Advanced Micro Devices, Inc. Apparatus for controlling access to a memory

Also Published As

Publication number Publication date
IL76431A (en) 1989-03-31
EP0199744A1 (de) 1986-11-05
JPS62500332A (ja) 1987-02-05
EP0199744B1 (de) 1990-04-11
WO1986002182A1 (en) 1986-04-10
US4692923A (en) 1987-09-08
IL76431A0 (en) 1986-01-31
DE3577151D1 (de) 1990-05-17
JPH0752596B2 (ja) 1995-06-05
CA1238715A (en) 1988-06-28

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