DE19781328T1 - Speichertestgerät - Google Patents

Speichertestgerät

Info

Publication number
DE19781328T1
DE19781328T1 DE19781328T DE19781328T DE19781328T1 DE 19781328 T1 DE19781328 T1 DE 19781328T1 DE 19781328 T DE19781328 T DE 19781328T DE 19781328 T DE19781328 T DE 19781328T DE 19781328 T1 DE19781328 T1 DE 19781328T1
Authority
DE
Germany
Prior art keywords
memory tester
tester
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19781328T
Other languages
English (en)
Other versions
DE19781328B4 (de
Inventor
Hiromi Oshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of DE19781328T1 publication Critical patent/DE19781328T1/de
Application granted granted Critical
Publication of DE19781328B4 publication Critical patent/DE19781328B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31935—Storing data, e.g. failure memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31926—Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE19781328T 1996-10-23 1997-10-23 Speichertestgerät Expired - Fee Related DE19781328B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP28066196A JP3547064B2 (ja) 1996-10-23 1996-10-23 メモリ試験装置
JP8/280661 1996-10-23
PCT/JP1997/003851 WO1998018133A1 (fr) 1996-10-23 1997-10-23 Appareil testeur de memoire

Publications (2)

Publication Number Publication Date
DE19781328T1 true DE19781328T1 (de) 1998-12-03
DE19781328B4 DE19781328B4 (de) 2006-02-16

Family

ID=17628176

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19781328T Expired - Fee Related DE19781328B4 (de) 1996-10-23 1997-10-23 Speichertestgerät

Country Status (5)

Country Link
US (1) US6158037A (de)
JP (1) JP3547064B2 (de)
KR (1) KR100328617B1 (de)
DE (1) DE19781328B4 (de)
WO (1) WO1998018133A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8977912B2 (en) * 2007-05-07 2015-03-10 Macronix International Co., Ltd. Method and apparatus for repairing memory
CN101911398B (zh) 2007-12-27 2013-02-27 山一电机株式会社 半导体装置用插座
CN104678202B (zh) * 2013-11-29 2018-07-06 技嘉科技股份有限公司 测试维修系统及其方法
KR102083266B1 (ko) 2013-11-29 2020-03-03 삼성전자주식회사 반도체 메모리 장치의 테스트 방법 및 반도체 메모리 시스템

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55108999A (en) * 1979-02-14 1980-08-21 Nec Corp Check method of ic memory
DE3482901D1 (de) * 1983-05-11 1990-09-13 Hitachi Ltd Pruefgeraet fuer redundanzspeicher.
JPH01128300A (ja) * 1987-11-13 1989-05-19 Sanyo Electric Co Ltd 不揮発性メモリ
US5062109A (en) * 1988-09-02 1991-10-29 Advantest Corporation Memory tester
JP2824283B2 (ja) * 1989-07-12 1998-11-11 株式会社アドバンテスト 半導体メモリ試験装置
EP0419869A3 (en) * 1989-09-29 1992-06-03 Kabushiki Kaisha Toshiba Personal computer for accessing two types of extended memories having different memory capacities
JPH0453100A (ja) * 1990-06-20 1992-02-20 Hitachi Ltd メモリ試験装置
JPH04177700A (ja) * 1990-11-13 1992-06-24 Toshiba Corp メモリ不良解析装置
JP3186359B2 (ja) * 1993-07-28 2001-07-11 安藤電気株式会社 物理アドレス変換回路
JPH0935496A (ja) * 1995-07-12 1997-02-07 Advantest Corp メモリ試験装置

Also Published As

Publication number Publication date
KR19990035774A (ko) 1999-05-25
DE19781328B4 (de) 2006-02-16
US6158037A (en) 2000-12-05
JP3547064B2 (ja) 2004-07-28
KR100328617B1 (ko) 2002-06-20
WO1998018133A1 (fr) 1998-04-30
JPH10125090A (ja) 1998-05-15

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20110502