DE1907567A1 - Elektrische Schaltungseinheit - Google Patents

Elektrische Schaltungseinheit

Info

Publication number
DE1907567A1
DE1907567A1 DE19691907567 DE1907567A DE1907567A1 DE 1907567 A1 DE1907567 A1 DE 1907567A1 DE 19691907567 DE19691907567 DE 19691907567 DE 1907567 A DE1907567 A DE 1907567A DE 1907567 A1 DE1907567 A1 DE 1907567A1
Authority
DE
Germany
Prior art keywords
substrate body
circuit unit
electrical circuit
conductors
glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19691907567
Other languages
German (de)
English (en)
Inventor
Lole John Denis
Davies Stanley Ellis
Hodgson Brian Purdam
Mcmillan Peter William
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
English Electric Co Ltd
Original Assignee
English Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by English Electric Co Ltd filed Critical English Electric Co Ltd
Publication of DE1907567A1 publication Critical patent/DE1907567A1/de
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
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    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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    • H01L23/46Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/473Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
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    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N97/00Electric solid-state thin-film or thick-film devices, not otherwise provided for
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    • H01L2924/097Glass-ceramics, e.g. devitrified glass
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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DE19691907567 1968-02-15 1969-02-14 Elektrische Schaltungseinheit Pending DE1907567A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB750768 1968-02-15

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DE1907567A1 true DE1907567A1 (de) 1969-09-18

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DE19691907567 Pending DE1907567A1 (de) 1968-02-15 1969-02-14 Elektrische Schaltungseinheit

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DE (1) DE1907567A1 (enrdf_load_stackoverflow)
FR (1) FR2001970A1 (enrdf_load_stackoverflow)
GB (1) GB1232621A (enrdf_load_stackoverflow)
NL (1) NL6902359A (enrdf_load_stackoverflow)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0139029A1 (en) * 1983-10-19 1985-05-02 Olin Corporation Improved semiconductor package
EP0078582A3 (en) * 1981-11-04 1986-01-29 Philips Electronic And Associated Industries Limited Electrical circuits
US4570337A (en) * 1982-04-19 1986-02-18 Olin Corporation Method of assembling a chip carrier
US4853491A (en) * 1984-10-03 1989-08-01 Olin Corporation Chip carrier
US4862323A (en) * 1984-04-12 1989-08-29 Olin Corporation Chip carrier
US4866571A (en) * 1982-06-21 1989-09-12 Olin Corporation Semiconductor package
US5014159A (en) * 1982-04-19 1991-05-07 Olin Corporation Semiconductor package

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4074342A (en) * 1974-12-20 1978-02-14 International Business Machines Corporation Electrical package for lsi devices and assembly process therefor
US4712161A (en) * 1985-03-25 1987-12-08 Olin Corporation Hybrid and multi-layer circuitry
US4840654A (en) * 1985-03-04 1989-06-20 Olin Corporation Method for making multi-layer and pin grid arrays
US4696851A (en) * 1985-03-25 1987-09-29 Olin Corporation Hybrid and multi-layer circuitry
US4725333A (en) * 1985-12-20 1988-02-16 Olin Corporation Metal-glass laminate and process for producing same
US4821151A (en) * 1985-12-20 1989-04-11 Olin Corporation Hermetically sealed package
US4687540A (en) * 1985-12-20 1987-08-18 Olin Corporation Method of manufacturing glass capacitors and resulting product

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0078582A3 (en) * 1981-11-04 1986-01-29 Philips Electronic And Associated Industries Limited Electrical circuits
US4570337A (en) * 1982-04-19 1986-02-18 Olin Corporation Method of assembling a chip carrier
US5014159A (en) * 1982-04-19 1991-05-07 Olin Corporation Semiconductor package
US4866571A (en) * 1982-06-21 1989-09-12 Olin Corporation Semiconductor package
EP0139029A1 (en) * 1983-10-19 1985-05-02 Olin Corporation Improved semiconductor package
US4862323A (en) * 1984-04-12 1989-08-29 Olin Corporation Chip carrier
US4853491A (en) * 1984-10-03 1989-08-01 Olin Corporation Chip carrier

Also Published As

Publication number Publication date
FR2001970A1 (enrdf_load_stackoverflow) 1969-10-03
NL6902359A (enrdf_load_stackoverflow) 1969-08-19
GB1232621A (enrdf_load_stackoverflow) 1971-05-19

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